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A Reed-Solomon Product-Code (RS-PC) decoder chip for DVD applications

dc.citation.epage238en_US
dc.citation.issue2en_US
dc.citation.spage229en_US
dc.citation.volume36en_US
dc.citation.woscount28
dc.contributor.authorChang, HCen_US
dc.contributor.authorShung, CBen_US
dc.contributor.authorLee, CYen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:44:14Z
dc.date.available2014-12-08T15:44:14Z
dc.date.issued2001-02-01en_US
dc.description.abstractIn this paper, a Reed-Solomon Product-Code (RS PC) decoder for DVD applications is presented. It mainly contains two frame-buffer controllers, a (182, 172) row RS decoder, and a (208, 192) column RS decoder, The RS decoder features an area-efficient key equation solver using a novel modified decomposed inversionless Berlekamp-Massey algorithm. The proposed RS-PC decoder solution was implemented using 0.6-mum CMOS single-poly double-metal (SPDM) standard cells. The chip size is 4.22 x 3.64 mm(2) with a core area of 2.90 x 2.88 mm(2),where the total gate count is about 26K, Test results show that the proposed RS-PC decoder chip can support 4x DVD speed with off-chip frame buffers or 8x DVD speed with embedded frame buffers operating at 3 V.en_US
dc.identifier.doi10.1109/4.902763en_US
dc.identifier.issn0018-9200en_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/4.902763en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/29871
dc.identifier.wosnumberWOS:000167163000007
dc.language.isoen_USen_US
dc.subjectReed-Solomon Product-Code decoderen_US
dc.subjectDVDen_US
dc.subjectdecomposed inversionless Berlekamp-Massey algorithmen_US
dc.titleA Reed-Solomon Product-Code (RS-PC) decoder chip for DVD applicationsen_US
dc.typeArticleen_US

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