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Board-Level ESD of Driver ICs on LCD Panel

dc.citation.epage64en_US
dc.citation.issue1en_US
dc.citation.spage59en_US
dc.citation.volume9en_US
dc.citation.woscount1
dc.contributor.authorTseng, Jen-Chouen_US
dc.contributor.authorHsu, Chung-Tien_US
dc.contributor.authorTsai, Chia-Kuen_US
dc.contributor.authorChen, Shu-Chuanen_US
dc.contributor.authorKer, Ming-Douen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:09:48Z
dc.date.available2014-12-08T15:09:48Z
dc.date.issued2009-03-01en_US
dc.description.abstractIn this paper, a method utilizing a charged-device model (CDM) test by the tape carrier package or chip-on-film (COF) samples to emulate the real-world board-level CDM or charged-board model (CBM) electrostatic discharge is proposed for large-sized chips such as liquid-crystal display (LCD) driver ICs, which successfully duplicated the same failure by CBM discharging. For small-sized chips, the evaluation board (or printed circuit board) emulation should minimize the parasitic RLC loading of the interconnection on the board to achieve a more accurate CBM discharging. In addition, guidelines regarding chip-level design and layout optimization are proposed and have been successfully implemented to improve the immunity.en_US
dc.identifier.doi10.1109/TDMR.2008.2009931en_US
dc.identifier.issn1530-4388en_US
dc.identifier.journalIEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITYen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TDMR.2008.2009931en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/7514
dc.identifier.wosnumberWOS:000263919100007
dc.language.isoen_USen_US
dc.subjectCharged-board model (CBM)en_US
dc.subjectelectrostatic discharge (ESD)en_US
dc.titleBoard-Level ESD of Driver ICs on LCD Panelen_US
dc.typeArticleen_US

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