Short-channel metal-gate TFTs with modified Schottky-barrier source/drain
| dc.citation.epage | 45 | en_US |
| dc.citation.issue | 1 | en_US |
| dc.citation.spage | 43 | en_US |
| dc.citation.volume | 27 | en_US |
| dc.citation.woscount | 15 | |
| dc.contributor.author | Huang, CF | en_US |
| dc.contributor.author | Tsui, BY | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:17:50Z | |
| dc.date.available | 2014-12-08T15:17:50Z | |
| dc.date.issued | 2006-01-01 | en_US |
| dc.description.abstract | A thin active layer, a fully silicided source/drain (S/D), a modified Schottky-barrier, a high dielectric constant (high-kappa) gate dielectric, and a metal gate are integrated to realize high-performance thin-film transistors (TFTs). Devices with 0.1-mu m gate length were fabricated successfully. Low threshold voltage, low subthreshold swing, high transconductance, low S/D resistance, high on/off current ratio, and negligible threshold voltage rolloff are demonstrated. It is thus suggested for the first time that the short-channel modified Schottky-barrier TFT is a solution to carrier out three-dimension integrated circuits and system-on-panel. | en_US |
| dc.identifier.doi | 10.1109/LED.2005.860378 | en_US |
| dc.identifier.issn | 0741-3106 | en_US |
| dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/LED.2005.860378 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/12925 | |
| dc.identifier.wosnumber | WOS:000234397800015 | |
| dc.language.iso | en_US | en_US |
| dc.subject | thin-film transistor (TFT) | en_US |
| dc.subject | Schottky-barrier (SB) | en_US |
| dc.subject | silicide | en_US |
| dc.title | Short-channel metal-gate TFTs with modified Schottky-barrier source/drain | en_US |
| dc.type | Article | en_US |