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A NEW FAST ONE-PASS THINNING ALGORITHM AND ITS PARALLEL HARDWARE IMPLEMENTATION

dc.citation.epage477en_US
dc.citation.issue7en_US
dc.citation.spage471en_US
dc.citation.volume11en_US
dc.citation.woscount13
dc.contributor.authorCHEN, CSen_US
dc.contributor.authorTSAI, WHen_US
dc.contributor.department資訊科學與工程研究所zh_TW
dc.contributor.departmentInstitute of Computer Science and Engineeringen_US
dc.date.accessioned2014-12-08T15:05:33Z
dc.date.available2014-12-08T15:05:33Z
dc.date.issued1990-07-01en_US
dc.identifier.issn0167-8655en_US
dc.identifier.journalPATTERN RECOGNITION LETTERSen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/4078
dc.identifier.wosnumberWOS:A1990DT24800004
dc.language.isoen_USen_US
dc.titleA NEW FAST ONE-PASS THINNING ALGORITHM AND ITS PARALLEL HARDWARE IMPLEMENTATIONen_US
dc.typeArticleen_US

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