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Fabrication and characterization of field-effect transistors with suspended-nanowire channels

dc.citation.epageen_US
dc.citation.issue5en_US
dc.citation.volume53en_US
dc.citation.woscount0
dc.contributor.authorKuo, Chia-Haoen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:36:06Z
dc.date.available2014-12-08T15:36:06Z
dc.date.issued2014-05-01en_US
dc.description.abstractNovel field-effect transistors (FETs) configured with suspended-nanowire (NW) channels were fabricated and characterized. Owing to the small aspect ratio of the etched structure, a simple wet etching process was adopted to release the NW channels. Our results show that the stiction issue can be eliminated as the channel length is sufficiently short or the air gap is sufficiently thick. In addition, the specific trends in pull-in and pull-out voltages as well as subthreshold swing (SS) with varying air gap thicknesses were investigated in terms of hysteresis characteristics. Finally, the devices were shown to withstand more than 500 cycles of operation in the cycling tests with repeatable hysteresis characteristics. (C) 2014 The Japan Society of Applied Physicsen_US
dc.identifier.doi10.7567/JJAP.53.056504en_US
dc.identifier.issn0021-4922en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICSen_US
dc.identifier.urihttp://dx.doi.org/10.7567/JJAP.53.056504en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/24438
dc.identifier.wosnumberWOS:000336693600029
dc.language.isoen_USen_US
dc.titleFabrication and characterization of field-effect transistors with suspended-nanowire channelsen_US
dc.typeArticleen_US

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