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A NEW STRUCTURE-ORIENTED MODEL FOR WELL RESISTANCE IN CMOS LATCHUP STRUCTURES

dc.citation.epage897en_US
dc.citation.issue4en_US
dc.citation.spage890en_US
dc.citation.volume34en_US
dc.citation.woscount1
dc.contributor.authorCHEN, MJen_US
dc.contributor.authorSZE, SCen_US
dc.contributor.authorCHEN, HHen_US
dc.contributor.authorWU, CYen_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department工學院zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentCollege of Engineeringen_US
dc.date.accessioned2014-12-08T15:06:05Z
dc.date.available2014-12-08T15:06:05Z
dc.date.issued1987-04-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/4651
dc.identifier.wosnumberWOS:A1987G864800026
dc.language.isoen_USen_US
dc.titleA NEW STRUCTURE-ORIENTED MODEL FOR WELL RESISTANCE IN CMOS LATCHUP STRUCTURESen_US
dc.typeArticleen_US

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