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Quasisuperlattice storage: A concept of multilevel charge storage

dc.citation.epage250en_US
dc.citation.issue2en_US
dc.citation.spage248en_US
dc.citation.volume85en_US
dc.citation.woscount17
dc.contributor.authorChang, TCen_US
dc.contributor.authorYan, STen_US
dc.contributor.authorLiu, PTen_US
dc.contributor.authorChen, CWen_US
dc.contributor.authorWu, HHen_US
dc.contributor.authorSze, SMen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department光電工程學系zh_TW
dc.contributor.department顯示科技研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentDepartment of Photonicsen_US
dc.contributor.departmentInstitute of Displayen_US
dc.date.accessioned2014-12-08T15:38:48Z
dc.date.available2014-12-08T15:38:48Z
dc.date.issued2004-07-12en_US
dc.description.abstractA concept of the quasisuperlattice storage has been demonstrated in this study. Under suitably operated voltage, two apparent states of charge storage can be distinguished. The memory effects are due to the multilevel storage in the quasisuperlattice. Also, the a-Si quantum wells provide a feasible design for the 2 bit per cell nonvolatile memory devices. The operation of the 2 bit per cell needs to be performed by Fowler-Nordheim tunneling instead of conventional channel hot electron injection. Additionally, the dual read operation of the source and drain sides for conventional SONOS 2 bit/cell device is not necessary, which simplifies the circuit design engineering. (C) 2004 American Institute of Physics.en_US
dc.identifier.doi10.1063/1.1772873en_US
dc.identifier.issn0003-6951en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.1772873en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/26568
dc.identifier.wosnumberWOS:000222784300030
dc.language.isoen_USen_US
dc.titleQuasisuperlattice storage: A concept of multilevel charge storageen_US
dc.typeArticleen_US

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