A Novel Scheme for Fabricating CMOS Inverters With Poly-Si Nanowire Channels
| dc.citation.epage | 833 | en_US |
| dc.citation.issue | 6 | en_US |
| dc.citation.volume | 33 | en_US |
| dc.citation.woscount | 2 | |
| dc.contributor.author | Kuo, Chia-Hao | en_US |
| dc.contributor.author | Lin, Horng-Chih | en_US |
| dc.contributor.author | Lee, I-Che | en_US |
| dc.contributor.author | Cheng, Huang-Chung | en_US |
| dc.contributor.author | Huang, Tiao-Yuan | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:23:36Z | |
| dc.date.available | 2014-12-08T15:23:36Z | |
| dc.date.issued | 2012-06-01 | en_US |
| dc.description.abstract | A novel complementary metal-oxide-semiconductor inverter with poly-Si nanowire channels is proposed and demonstrated in this letter. The scheme employs a clever tilted-angle implant process in the fabrication; therefore, the formation of the source and drain of both p-channel and n-channel devices requires only one lithographic step. The fabricated n-channel and p-channel field-effect transistors in the inverters show a high ON/OFF current ratio, an acceptable subthreshold swing, and a symmetric driving current, thus enabling the realization of excellent characteristics of the inverters. | en_US |
| dc.identifier.issn | 0741-3106 | en_US |
| dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/16497 | |
| dc.identifier.wosnumber | WOS:000305835000031 | |
| dc.language.iso | en_US | en_US |
| dc.subject | CMOS inverter | en_US |
| dc.subject | poly-Si | en_US |
| dc.subject | system-on-panel (SoP) | en_US |
| dc.subject | thin-film transistor (TFT) | en_US |
| dc.title | A Novel Scheme for Fabricating CMOS Inverters With Poly-Si Nanowire Channels | en_US |
| dc.type | Article | en_US |