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A Novel Array-Based Test Methodology for Local Process Variation Monitoring

dc.citation.epage293en_US
dc.citation.issue2en_US
dc.citation.spage280en_US
dc.citation.volume24en_US
dc.citation.woscount0
dc.contributor.authorLuo, Tseng-Chinen_US
dc.contributor.authorChao, Mango C. -T.en_US
dc.contributor.authorWu, Michael Shien-Yangen_US
dc.contributor.authorLi, Kuo-Tsaien_US
dc.contributor.authorHsia, Chin C.en_US
dc.contributor.authorTseng, Huan-Chien_US
dc.contributor.authorFisher, Philip A.en_US
dc.contributor.authorHuang, Chuen-Uanen_US
dc.contributor.authorChang, Yuan-Yaoen_US
dc.contributor.authorPan, Samuel C.en_US
dc.contributor.authorYoung, Konrad K. -L.en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:11:39Z
dc.date.available2014-12-08T15:11:39Z
dc.date.issued2011-05-01en_US
dc.description.abstractAs process technologies continually advance, local process variation has greatly increased and gradually become one of the most critical factors for integrated circuit manufacturing. To monitor local process variation, a large number of devices-under-test (DUTs) in close proximity must be measured. In this paper, we present a novel array-based test structure to characterize local process variation with limited area overhead. The proposed test structure can guarantee high measurement accuracy by application of the test techniques proposed in this paper: hardware IR compensation, voltage bias elevation, and leakage-current cancelation. Furthermore, the DUT layout need not be modified for the proposed test structure. Thus, the measured variation exactly reflects the reality in the manufacturing environment. The measured results from the few most advanced process-technology nodes demonstrate the effectiveness and efficiency of the proposed test structure in quantifying local process variation.en_US
dc.identifier.doi10.1109/TSM.2010.2095891en_US
dc.identifier.issn0894-6507en_US
dc.identifier.journalIEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURINGen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TSM.2010.2095891en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/8940
dc.identifier.wosnumberWOS:000290173900018
dc.language.isoen_USen_US
dc.subjectAutomatic test equipmenten_US
dc.subjectmeasurement techniquesen_US
dc.subjectmismatchen_US
dc.subjectprocess variationen_US
dc.subjecttest structuresen_US
dc.subjecttest structure designen_US
dc.subjecttransistor arrayen_US
dc.titleA Novel Array-Based Test Methodology for Local Process Variation Monitoringen_US
dc.typeArticleen_US

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