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Multiloop Interleaved Control for Three-Level Switch-Mode Rectifier in AC/DC Applications

dc.citation.epage3219en_US
dc.citation.issue7en_US
dc.citation.spage3210en_US
dc.citation.volume61en_US
dc.citation.woscount0
dc.contributor.authorChen, Hung-Chien_US
dc.contributor.authorLiao, Jhen-Yuen_US
dc.contributor.department電機資訊學士班zh_TW
dc.contributor.departmentUndergraduate Honors Program of Electrical Engineering and Computer Scienceen_US
dc.date.accessioned2014-12-08T15:34:54Z
dc.date.available2014-12-08T15:34:54Z
dc.date.issued2014-07-01en_US
dc.description.abstractIn this paper, multiloop interleaved control (MIC) is proposed, and it is combined with conventional multiloop control and the interleaved pulsewidth modulation scheme. The average behavior of the interleaved three-level switch-mode rectifier (SMR) behaves similar to the conventional boost-type SMR even though two capacitor voltages are imbalanced. It implies that conventional multiloop control can be applied to the interleaved three-level SMRs to achieve the desired power factor correction function. The proposed MIC is digitally implemented and verified in a field-programmable-gate-array-based system. The provided results show that MIC stably works and the capacitor voltages are eventually balanced during the system operations.en_US
dc.identifier.doi10.1109/TIE.2013.2278961en_US
dc.identifier.issn0278-0046en_US
dc.identifier.journalIEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TIE.2013.2278961en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/23741
dc.identifier.wosnumberWOS:000331296000009
dc.language.isoen_USen_US
dc.subjectInterleaved controlen_US
dc.subjectthree-level boost switch-mode rectifier (SMR)en_US
dc.titleMultiloop Interleaved Control for Three-Level Switch-Mode Rectifier in AC/DC Applicationsen_US
dc.typeArticleen_US

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