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0.13-mu m low-kappa-Cu CMOS logic-based technology for 2.1-Gb high data rate read-channel

dc.citation.epage763en_US
dc.citation.issue5en_US
dc.citation.spage757en_US
dc.citation.volume51en_US
dc.citation.woscount3
dc.contributor.authorGuo, JCen_US
dc.contributor.authorLien, WYen_US
dc.contributor.authorTsai, TLen_US
dc.contributor.authorChen, SMen_US
dc.contributor.authorWu, CMen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:39:18Z
dc.date.available2014-12-08T15:39:18Z
dc.date.issued2004-05-01en_US
dc.description.abstractHigh-performance analog/digital elements have been successfully fabricated bya 0.13-mum low-kappa-Cu logic-based mixed-signal CMOS process in a single chip to enable a 2.1-Gb/s read-channel for hard disk drives that is a record-high data rate supported by fully CMOS solution. The high-performance analog devices demonstrate superior drivability, matching, noise immunity, and reliability by a unique dual-gate oxide module to support the aggressive oxide thickness scaling and maintain promisingly good reliability in all aspects.en_US
dc.identifier.doi10.1109/TED.2004.826884en_US
dc.identifier.issn0018-9383en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2004.826884en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/26844
dc.identifier.wosnumberWOS:000221117300016
dc.language.isoen_USen_US
dc.subjectdual-gate oxideen_US
dc.subjecthigh-performance analog (HPA)en_US
dc.subjectread-channelen_US
dc.title0.13-mu m low-kappa-Cu CMOS logic-based technology for 2.1-Gb high data rate read-channelen_US
dc.typeArticleen_US

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