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A fault-tolerant multistage combining network

dc.citation.epage28en_US
dc.citation.issue1en_US
dc.citation.spage14en_US
dc.citation.volume34en_US
dc.citation.woscount1
dc.contributor.authorLu, NPen_US
dc.contributor.authorChung, CPen_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department資訊科學與工程研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentInstitute of Computer Science and Engineeringen_US
dc.date.accessioned2014-12-08T15:02:43Z
dc.date.available2014-12-08T15:02:43Z
dc.date.issued1996-04-10en_US
dc.description.abstractIn this paper, we propose a solution to both fault tolerance and hot-spot contention problems in multiprocessor systems with multistage interconnection networks. Combining networks are known to be effective in handling hot-spot traffic. However, the fault tolerance capability of unique-path combining network is insufficient and must be enhanced. Thus, we use the chaining scheme, which provides alternate routing paths by connecting intrastage switching elements with a chain, to enhance the fault tolerance capability of combining network. As a result, we propose a chained combining network. Because of the bidirectionality of combining networks, we also develop routing procedures for the chained combining network. With slight modifications, these routing procedures can also be used in other multipath fault-tolerant combining networks. (C) 1996 Academic Press, Inc.en_US
dc.identifier.doi10.1006/jpdc.1996.0042en_US
dc.identifier.issn0743-7315en_US
dc.identifier.journalJOURNAL OF PARALLEL AND DISTRIBUTED COMPUTINGen_US
dc.identifier.urihttp://dx.doi.org/10.1006/jpdc.1996.0042en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/1349
dc.identifier.wosnumberWOS:A1996UJ38500002
dc.language.isoen_USen_US
dc.titleA fault-tolerant multistage combining networken_US
dc.typeArticleen_US

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