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Design of an All-Digital LVDS Driver

dc.citation.epage1644en_US
dc.citation.issue8en_US
dc.citation.spage1635en_US
dc.citation.volume56en_US
dc.citation.woscount6
dc.contributor.authorLu, Hungwenen_US
dc.contributor.authorWang, Hsin-Wenen_US
dc.contributor.authorSu, Chauchinen_US
dc.contributor.authorLiu, Chien-Nan Jimmyen_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.date.accessioned2014-12-08T15:09:00Z
dc.date.available2014-12-08T15:09:00Z
dc.date.issued2009-08-01en_US
dc.description.abstractThis paper presents an all-digital low-voltage-differential-signaling (LVDS) driver design for Serial Advanced Technology Attachment II. A simultaneous-switching-noise reduction technique and an autocalibration mechanism are implemented to suppress switching noise and to handle process and environmental variations. The circuit is implemented in a 0.18-mu m 1P6M CMOS process with a core area of 0.072 mm(2). At 3 Gbps, it consumes 9 mW of power under a 1.8-V power supply or 3 pJ/bit.en_US
dc.identifier.doi10.1109/TCSI.2008.2008279en_US
dc.identifier.issn1549-8328en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2008.2008279en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/6844
dc.identifier.wosnumberWOS:000269213400002
dc.language.isoen_USen_US
dc.subjectLow-voltage-differential-signaling (LVDS) driveren_US
dc.subjectsimultaneous switching noise (SSN)en_US
dc.titleDesign of an All-Digital LVDS Driveren_US
dc.typeArticleen_US

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