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Analysis and Design of the 0.13-mu m CMOS Shunt-Series Series-Shunt Dual-Feedback Amplifier

dc.citation.epage2383en_US
dc.citation.issue11en_US
dc.citation.spage2373en_US
dc.citation.volume56en_US
dc.citation.woscount4
dc.contributor.authorWu, Tzung-Hanen_US
dc.contributor.authorSyu, Jin-Siangen_US
dc.contributor.authorMeng, Chin-Chunen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.date.accessioned2014-12-08T15:08:20Z
dc.date.available2014-12-08T15:08:20Z
dc.date.issued2009-11-01en_US
dc.description.abstractThis paper demonstrates the design methodology of the shunt-series series-shunt dual-feedback Meyer wideband amplifier. The small-signal S-parameters are obtained for the first time using the pole-and-zero analysis, thus giving the RF designers a detailed insight into the Meyer amplifier. A 10-GHz wideband amplifier is demonstrated in this paper, using 0.13-mu m CMOS technology to verify our design theory. The experimental results of the S-parameters highly agree with our theory.en_US
dc.identifier.doi10.1109/TCSI.2009.2015603en_US
dc.identifier.issn1549-8328en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2009.2015603en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/6470
dc.identifier.wosnumberWOS:000271479300001
dc.language.isoen_USen_US
dc.subjectDual feedbacken_US
dc.subjectMeyer amplifieren_US
dc.subjectseries-shunt feedbacken_US
dc.subjectshunt-series feedbacken_US
dc.subjectwideband amplifieren_US
dc.titleAnalysis and Design of the 0.13-mu m CMOS Shunt-Series Series-Shunt Dual-Feedback Amplifieren_US
dc.typeArticleen_US

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