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AN INTEGRATED CAD SYSTEM FOR ALGORITHM-SPECIFIC IC DESIGN

dc.citation.epage463en_US
dc.citation.issue4en_US
dc.citation.spage447en_US
dc.citation.volume10en_US
dc.citation.woscount23
dc.contributor.authorSHUNG, CBen_US
dc.contributor.authorJAIN, Ren_US
dc.contributor.authorRIMEY, Ken_US
dc.contributor.authorWANG, Een_US
dc.contributor.authorSRIVASTAVA, MBen_US
dc.contributor.authorRICHARDS, BCen_US
dc.contributor.authorLETTANG, Een_US
dc.contributor.authorAZIM, SKen_US
dc.contributor.authorTHON, Len_US
dc.contributor.authorHILFINGER, PNen_US
dc.contributor.authorRABAEY, JMen_US
dc.contributor.authorBRODERSEN, RWen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:05:17Z
dc.date.available2014-12-08T15:05:17Z
dc.date.issued1991-04-01en_US
dc.description.abstractLAGER is an integrated computer-aided design (CAD) system for algorithm-specific integrated circuit (IC) design, targeted at applications such as speech processing, image processing, telecommunications, and robot control. LAGER provides user interfaces at behavioral, structural, and physical levels and allows easy integration of new CAD tools. LAGER consists of a behavioral mapper and a silicon assembler. The behavioral mapper maps the behavior onto a parameterized structure to produce microcode and parameter values. The silicon assembler then translates the filled-out structural description into a physical layout and with the aid of simulation tools, the user can fine tune the data path by iterating this process. The silicon assembler can also be used without the behavioral mapper for high sample rate applications. A number of algorithm-specific IC's designed with LAGER have been fabricated and tested, and as examples, a robot arm controller chip and a real-time image segmentation chip will be described.en_US
dc.identifier.doi10.1109/43.75628en_US
dc.identifier.issn0278-0070en_US
dc.identifier.journalIEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/43.75628en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/3821
dc.identifier.wosnumberWOS:A1991FE74800004
dc.language.isoen_USen_US
dc.titleAN INTEGRATED CAD SYSTEM FOR ALGORITHM-SPECIFIC IC DESIGNen_US
dc.typeArticleen_US

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