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Forward gated-diode measurement of filled traps in high-field stressed thin oxides

dc.citation.epage1683en_US
dc.citation.issue8en_US
dc.citation.spage1682en_US
dc.citation.volume47en_US
dc.citation.woscount4
dc.contributor.authorChen, MJen_US
dc.contributor.authorKang, TKen_US
dc.contributor.authorHuang, HTen_US
dc.contributor.authorLiu, CHen_US
dc.contributor.authorChang, YJen_US
dc.contributor.authorFu, KYen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:45:00Z
dc.date.available2014-12-08T15:45:00Z
dc.date.issued2000-08-01en_US
dc.description.abstractThe forward gated-diode monitoring technique can find its potential applications in assessing the filled traps in MOSFET thin oxides, which are subjected to high-field stressing and then followed by hot-electrons filling scheme. Our measurement of the gate voltage shift associated with the forward current peak produces a power lan relation between the filled trap density and the electron stress fluence, indeed in close agreement with that obtained by MOSFET threshold voltage shift.en_US
dc.identifier.doi10.1109/16.853050en_US
dc.identifier.issn0018-9383en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.identifier.urihttp://dx.doi.org/10.1109/16.853050en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/30369
dc.identifier.wosnumberWOS:000088531400022
dc.language.isoen_USen_US
dc.subjectgated-diodeen_US
dc.subjecthot electronen_US
dc.subjectMOSFETen_US
dc.subjectneutral trapen_US
dc.subjectoxide breakdownen_US
dc.subjectSILCen_US
dc.subjectthin oxideen_US
dc.titleForward gated-diode measurement of filled traps in high-field stressed thin oxidesen_US
dc.typeArticleen_US

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