AN ANALYTICAL MODEL FOR THE ABOVE-THRESHOLD CHARACTERISTICS OF POLYSILICON THIN-FILM TRANSISTORS

Abstract

An analytical model for the above-threshold characteristics of long-channel, small-grain and thin channel polysilicon thin film transistors (TFT's) is presented. This model is constructed by considering the barrier potential and the carrier trapping effect at grain boundaries of the channel. A band tail state located at E(c) - 0.15 eV is taken into account to simulate the I-V characteristics. Based on the model, the theoretically simulated results show good agreement with the experimental data of the plasma-passivated and unpassivated TFT devices in a wide range of the gate, drain biases and the temperature. The correlation of the transconductance to the gate bias is also investigated, It is found that the decrease of grain-boundary barrier potential with the gate voltage enhances the transconductance, while this enhancement effect becomes insignificant and causes the decrease of the transconductance at the high gate bias.