Quantitative investigation of hot carrier induced drain current degradation in submicron drain-engineered metal-oxide-semiconductor field-effect-transistors

Abstract

Parameters, such as the total amount of hot carrier induced interface states and substrate current, are not sufficient to evaluate hot carrier reliability in drain-engineered metal-oxide-se mi conductor field-effect-transistors (MOSFETs). In this paper, for the first time, the distributions of hot carrier induced interface states are physically characterized and incorporated into two-dimensional device simulation to quantitatively study the structure-dependent drain current degradation in submicron MOSFETs, which give us insight into the relationship between degradation modes and device structures. The results show that the hot carrier induced series resistance effect in the sidewall spacer region plays an important role in drain-engineered MOSFETs. A different gate oxide thickness dependence of drain current degradation in thin gate oxide lightly-doped drain (LDD) MOSFETs is observed and is explained as the interface states enhanced series resistance effect in the LDD region.