Application of plasma immersion ion implantation doping to low-temperature processed poly-Si TFT's
| dc.citation.epage | 434 | en_US |
| dc.citation.issue | 11 | en_US |
| dc.citation.spage | 432 | en_US |
| dc.citation.volume | 19 | en_US |
| dc.citation.woscount | 3 | |
| dc.contributor.author | Yeh, CF | en_US |
| dc.contributor.author | Chen, TJ | en_US |
| dc.contributor.author | Liu, C | en_US |
| dc.contributor.author | Shao, JQ | en_US |
| dc.contributor.author | Cheung, NW | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:47:26Z | |
| dc.date.available | 2014-12-08T15:47:26Z | |
| dc.date.issued | 1998-11-01 | en_US |
| dc.description.abstract | This work applied, for the first time, plasma immersion ion implantation (PIII) for source/drain doping on low-temperature processed polysilicon thin-film transistors (poly-Si TFT's), Experimental results indicate that PIII doping can provide adequate dopant concentration and junction depth for source/drain. In addition, H-2-diluted phosphorus pill can promote dopant activation more efficiently during RTA at 600 degrees C than with conventional ion implantation (II) technology. The excellent characteristics of PIII doped poly-Si TFT's resemble those of conventional II doped ones. | en_US |
| dc.identifier.doi | 10.1109/55.728903 | en_US |
| dc.identifier.issn | 0741-3106 | en_US |
| dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/55.728903 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/31804 | |
| dc.identifier.wosnumber | WOS:000076720600012 | |
| dc.language.iso | en_US | en_US |
| dc.title | Application of plasma immersion ion implantation doping to low-temperature processed poly-Si TFT's | en_US |
| dc.type | Article | en_US |