Optimal 1-edge fault-tolerant designs for ladders
| dc.citation.epage | 92 | en_US |
| dc.citation.issue | 2 | en_US |
| dc.citation.spage | 87 | en_US |
| dc.citation.volume | 84 | en_US |
| dc.citation.woscount | 4 | |
| dc.contributor.author | Chuang, YC | en_US |
| dc.contributor.author | Hsu, LH | en_US |
| dc.contributor.author | Chang, CH | en_US |
| dc.contributor.department | 資訊工程學系 | zh_TW |
| dc.contributor.department | Department of Computer Science | en_US |
| dc.date.accessioned | 2014-12-08T15:41:49Z | |
| dc.date.available | 2014-12-08T15:41:49Z | |
| dc.date.issued | 2002-10-31 | en_US |
| dc.description.abstract | A graph G* is 1-edge fault-tolerant with respect to a graph G, denoted by 1-EFT(G), if every graph obtained by removing any edge from G* contains G. A1-EFT(G) graph is optimal if it contains the minimum number of edges among all 1-EFT(G) graphs. The kth ladder graph, L-k, is defined to be the cartesian product of the P-k and P-2 where P-n is the n-vertex path graph. In this paper, we present several 1-edge fault-tolerant graphs with respect to ladders. Some of these graphs are proven to be optimal. (C) 2002 Elsevier Science B.V. All rights reserved. | en_US |
| dc.identifier.doi | 10.1016/S0020-0190(02)00225-9 | en_US |
| dc.identifier.issn | 0020-0190 | en_US |
| dc.identifier.journal | INFORMATION PROCESSING LETTERS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1016/S0020-0190(02)00225-9 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/28441 | |
| dc.identifier.wosnumber | WOS:000178093900005 | |
| dc.language.iso | en_US | en_US |
| dc.subject | Cartesian product | en_US |
| dc.subject | edge fault tolerance | en_US |
| dc.subject | meshes | en_US |
| dc.subject | ladders | en_US |
| dc.subject | fault tolerance | en_US |
| dc.title | Optimal 1-edge fault-tolerant designs for ladders | en_US |
| dc.type | Article | en_US |