Thermal-Aware Logic Block Placement for 3D FPGAs Considering Lateral Heat Dissipation
| dc.citation.epage | 268 | en_US |
| dc.contributor.author | Huang, Juinn-Dar | en_US |
| dc.contributor.author | Huang, Ya-Shih | en_US |
| dc.contributor.author | Hsu, Mi-Yu | en_US |
| dc.contributor.author | Chang, Han-Yuan | en_US |
| dc.contributor.department | 交大名義發表 | zh_TW |
| dc.contributor.department | National Chiao Tung University | en_US |
| dc.date.accessioned | 2014-12-08T15:23:05Z | |
| dc.date.available | 2014-12-08T15:23:05Z | |
| dc.date.issued | 2012 | en_US |
| dc.identifier.isbn | 978-1-4503-1155-7 | en_US |
| dc.identifier.journal | FPGA 12: PROCEEDINGS OF THE 2012 ACM-SIGDA INTERNATIONAL SYMPOSIUM ON FIELD PROGRAMMABLE GATE ARRAYS | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/16229 | |
| dc.identifier.wosnumber | WOS:000304019700045 | |
| dc.language.iso | en_US | en_US |
| dc.subject | Three-dimensional integration | en_US |
| dc.subject | 3D FPGAs | en_US |
| dc.subject | thermal-aware placement | en_US |
| dc.subject | logic block placement | en_US |
| dc.title | Thermal-Aware Logic Block Placement for 3D FPGAs Considering Lateral Heat Dissipation | en_US |
| dc.type | Meeting Abstract | en_US |
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