Browsing by Author "Kao, H. L."

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A 2.4/5 GHz dual-band VCO using a variable inductor and switched resonator
(2007)
Kao, H. L.
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Yang, D. Y.
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Chin, Albert
;
McAlister, S. P.
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電機學院
A dual-band, low phase noise, low power and small sized voltage-controlled oscillator (VCO) with a variable inductor and switched resonator is described. The dual-band VCO operated near 2.4 GHz and 5 GHz with a phase noise of 120 and -121 dBc/Hz at a 1 MHz offset and a tuning range of 250 MHz and 1.2 GHz, respectively. The power consumption was 1.5/1.8 mW for 2.4/5 GHz operations. The total size the VCO was only 1.06 mm(2), which was achieved by using one inductor which was connected with a switch to give good dual-band operation and performance.
A CMOS-Compatible, High RF Power, Asymmetric-LDD MOSFET with Excellent Linearity
(2008)
Chang, T.
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Kao, H. L.
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Chen, Y. J.
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Liu, S. L.
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McAlister, S. P.
We report the performance of 0.18 mu m RF power MOSFETs with an Asymmetric-Lightly-Doped-Drain (LDD) design. Such devices do not have an n-type drain extension and exhibited better characteristics than conventional MOSFETs at same gate length. The devices showed a DC breakdown voltage of 6.9 V, a 0.54 W/mm power density, 115 GHz f(max), and a good adjacent channel power ratio (ACPR) linearity, as well as a 52% drain efficiency at 2.4 GHz.
A low-power current-reuse LNA for ultra-wideband wireless receivers from 3.1 to 10.6 GHz
(2007)
Kao, H. L.
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Chin, Albert
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Chang, K. C.
;
McAlister, S. P.
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交大名義發表
We present an ultra-wideband 3.1-10.6 GHz low-noise amplifier which uses a two-stage current-reuse structure to reduce the power. Fabricated in a 0.18 mu m CMOS process, the IC prototype achieved a power gain of 9.3 dB, a noise figure (NF) of < 5.6 dB, an input match of < -8 dB over the band, while consuming only 9.4 mW.
A parallel coupled-line filter using VLSI backend interconnect with high resistivity substrate
(2006-01-01)
Chen, C. C.
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Kao, H. L.
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Chiang, K. C.
;
Chin, Albert
;
電子工程學系及電子研究所
This paper reports our progress in developing parallel coupled-line filters based on Si-based VLSI backend interconnects for millimeter-wave applications. The resonant frequency of this coupled-line filter increases with increasing spacing-gap and with increasing IDM thickness. By using high resistivity substrate, the parallel coupled-line band-pass filter is extremely effective in reducing substrate loss, and also provides very low insertion loss, even at the millimeter-wave regime. In addition, the parallel coupled-line filter suitable for advanced system-on-a-chips at the millimeter wave application achieves high performance characteristics, which show low insertion loss, wide band, and compatibility with standard VLSI process.
Calibration 90 nm node RF mosfets, including stress degradation
(2007-03-01)
Kao, H. L.
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Kao, C. H.
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Chin, A.
;
Liao, C. C.
;
電子工程學系及電子研究所
Using a microstrip line layout, a low minimum noise figure (NFmin) of 0.51 dB, at 10 GHZ, was directly measured for 90 nm node NMOSFETs (65 nm physical gate length). The NFmin was located at the peak f(T) of 152 GHz, coinciding with the peak transconductance (g). On the basis of these measurements, a self-consistent model of the DC I-V, S-parameters, and NFmin results was developed, including the changes after hot-carrier stress. (c) 2007 Wiley Periodicals, Inc.
Channel Modification Engineering by Plasma Processing in Tin-Oxide Thin Film Transistor: Experimental Results and First-Principles Calculation
(2017-01-01)
Chiu, Y. C.
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Chen, P. C.
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Chang, S. L.
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Zheng, Z. W.
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Cheng, C. H.
In this paper, we investigated the effects of oxygen plasma treatment on tin oxide (SnOx) thin film transistors (TFTs). By using oxygen plasma treatment on SnOx active channel layer, excess oxygen was incorporated to the channel layer and converted oxygen-deficient SnOx to oxygen-rich SnO2-x, which in turn causes the device operation from p-type to n-type. Tuning the different exposure time of oxygen plasma, the optimal TFT device exhibits n-type properties with an on/off current ratio of 2.6 x 10(4), a very high field-effect mobility of 89 cm(2) V-1 s(-1), and a threshold voltage of -0.95 V. Furthermore, the effects of oxygen plasma treatment on band structure, density of states and electron density difference of the SnOx channel layer were performed by the first-principles calculation using density functional theory. The results show that the oxygen plasma treatment approach has high potential for high-performance TFT applications. (C) 2017 The Electrochemical Society. All rights reserved.
Comparison of InGaAs MOSFETs with germanium-on-insulator CMOS
(2006-08-01)
Chin, Albert
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Chen, C.
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Yu, D. S.
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Kao, H. L.
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McAlister, S. P.
High mobility channel materials such as Ge and compound semiconductors (CS) show promise for future generation MOSFETs. The challenge is to integrate these materials with a Si substrate and create good interfaces in the devices. Here we show dislocation-free CSOI and Ge-on-insulator (GOI) devices with good characteristics. The InAlAs/InGaAs/InAlAs-OI on Si MESFETs shows a mobility of 8100 cm(2)/V s. To reduce the leakage current an Al2O3/InGaAs MOSFET was fabricated. Good 451 cm(2)/V S mobility was obtained, higher than the 340 cm(2)/V S of GOI MOSFETs. However the marginally better mobility than GOI and 18X lower mobility than MESFETs indicate that the soft phonon scattering, high-kappa interface scattering and process variations are challenges for CS MOSFETs. In contrast, the GOI CMOS provides a simpler process and significantly higher electron and hole mobilities than its Si counterparts. (C) 2006 Elsevier Ltd. All rights reserved.
DC-RF performance improvement for strained 0.13 mu m MOSFETs mounted on a flexible plastic substrate
(2006)
Kao, H. L.
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Chin, Albert
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Liao, C. C.
;
Tseng, Y. Y.
;
McAlister, S. P.
By applying 0.7% tensile strain to the flexible die of a 0.13 mu m thin-body (40 mu m) Si MOSFET mounted on plastic, both the DC and RF performance have been improved. The current I(d,sat) was 14.3% higher, and f(T) increased from 103 to 118 GHz with NF(min) decreasing from 0.89 to 0.75 dB at 10 GHz. These improvements are comparable with those for SiN-capped 90 nm strained-Si nMOS and consistent with device simulations. The approach has the advantages of better RF passive devices on the insulating plastic substrate and low cost.
Electric stress effect on DC-RF performance degradation of 0.18-mu m mosfets
(2006-10-01)
Chen, C. C.
;
Kao, H. L.
;
Chin, Albert
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
We have studied the electric stress effect on DC-RF performance degradation of 64 gate fingers 0.18-mu m RF MOSFETs. The fresh devices show good transistor's DC to RF characteristics of small sub-threshold swing of 85 mV/dec, large drive current (I-d,I-sat) of 500 mu A/mu m, high unity-gain cut-off frequency (f(t)) of 47 GHz, and low minimum not. se figure (NFmin) of 1.3 dB at 10 GHz. The hot carrier stress for 20% I-d,I-sat reduction causes DC g(m) and r(o) degradation as well as the lower RF current gain by 2.35 dB, f(t) reduction to 35.7 GHz, increasing NFmin to 1.7 dB at 10 GHz and poor output impedance matching. (C) 2006 Wiley Periodicals, Inc.
Electrical instability of InGaZnO thin-film transistors with and without titanium sub-oxide layer under light illumination
(2017-03-01)
Chiu, Y. C.
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Zheng, Z. W.
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Cheng, C. H.
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Chen, P. C.
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Yen, S. S.
The electrical instability behaviors of amorphous indium-gallium-zinc oxide thin-film transistors with and without titanium sub-oxide passivation layer were investigated under light illumination in this study. For the unpassivated IGZO TFT device, in contrast with the dark case, a noticeable increase of the sub-threshold swing was observed when under the illumination environment, which can be attributed to the generation of ionized oxygen vacancies within the alpha-IGZO active layer by high energy photons. For the passivated TFT device, the much smaller SS of similar to 70 mV/dec and high device mobility of >100 cm(2)/Vs at a drive voltage of 3 V with negligible degradation under light illumination are achieved due to the passivation effect of n-type titanium sub-oxide semiconductor, which may create potential application for high-performance display.
High-performance SrTiO3 MIM capacitors for analog applications
(2006-09-01)
Chiang, K. C.
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Huang, Ching-Chien
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Chen, G. L.
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Chen, Wen Jauh
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Kao, H. L.
TAN/SrTiO3/TaN capacitors with a capacitance density of 28-35 fF/mu m(2) have been developed by using a high-kappa (kappa = 147-169) SrTiO3 dielectric containing nanometersized microcrystals (3-10 nm). A small capacitance effective thickness was achieved by reducing the interfacial TaON using N+ treatment on the lower TaN electrode during post-deposition annealing. The small (92 ppm/V-2) voltage coefficient of the capacitance and the 3 x 10(-8) A/cm(2) leakage current at 2 V exceed the International Technology Roadmap for Semiconductors' requirements for analog capacitors at year 2018.
Improved RF Power Performance in a 0.18-mu m MOSFET Which Uses an Asymmetric Drain Design
(2008-12-01)
Chang, T.
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Kao, H. L.
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McAlister, S. P.
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Horng, K. Y.
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Chin, Albert
We have fabricated 0.18-mu m asymmetric MOSFETs using a foundry-standard 1P6M process, without making any process modifications. In comparison with a conventional 0.18-mu m MOSFET, the asymmetric MOSFET design leads to a 64% improvement in the saturated output power and 8 dB better adjacent channel power ratio. The improvement in the RF power E performance of these MOS transistors suggests that they should be suitable for medium power amplifiers.
Improvement of the performance of strained 0.13 mu m MOSFETs mounted on flexible plastic substrates
(2007)
Kao, H. L.
;
Liao, C. C.
;
McAlister, S. P.
;
Chin, Albert
;
電子工程學系及電子研究所
Insight of stress effect on the ONO stack layer in a SONOS-type flash memory cell
(2006)
Yeh, C. C.
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Liao, Y. Y.
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Wang, Tahui
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Tsai, W. J.
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Lu, T. C.
The stress effect on the ONO stack layer in a two-bit SONOS-type memory cell is investigated. Our results show that P/E cycles induced stress will generate extra nitride, oxide, and interface traps in the ONO stack layer. Besides, these stress created traps are unstable and will be annealed by additional thermal treatment. Storage electrons escape from stress-created nitride and oxide traps and the trap annealing effects are root causes of charge loss in a SONOS cell.
RFIC TaN/SrTio(3)/TaN MIM capacitors with 35 fF/mu m(2) capacitance density
(2006-09-01)
Huang, C. C.
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Chiang, K. C.
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Kao, H. L.
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Chin, Albert
;
Chen, W. J.
A very high density of 35 fF/mu m(2) is measured in a radio frequency (RF) metal-insulator-metal (MIM) capacitor using high-kappa (kappa = 169) SrTiO3 fabricated by very large scale integration (VLSI) back-end integration. A very small capacitance reduction of 4.1% from 100 kHz to 10 GHz, low leakage current of 1 X 10(-7) A/cm(2) at 1 V are simultaneously measured. The small voltage dependence of a capacitance Delta C/C of 637 ppm is also obtained at 2 GHz, which ensures this MIM capacitor useful for high precision circuits operated at a RF regime.
Strain enhanced DC-RF performance of 0.13 mu m nMOSFETs on flexible plastic substrate
(2006-07-06)
Chin, A.
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Kao, H. L.
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Kao, C. H.
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Liao, C. C.
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Tseng, Y. Y.
A 14.3% saturation current I-d,(sat) improvement and 0.75 dB minimum noise figure (NFmin) at 10 GHz were measured by applying similar to 0.7% tensile strain for 16 finger, 0.13 mu m RF MOSFETs with thin-body (40 mu m) substrate mounted on plastic. These excellent results for mechanical-strain on DC-RF MOSFETs are better than those of SiN-capped 90 nm strained-Si nMOSFETs and consistent with device simulations.
The Reliability Study and Device Modeling for p-HEMT Microwave Power Transistors
(2011)
Liu, S. L.
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Chang, H. M.
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Chang, T.
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Kao, H. L.
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Cheng, C. H.
In this paper, the commercial 0.5-mu m AlGaAs/InGaAs/GaAs pseudo-morphic high electron mobility transistors were subjected to both high-drain voltage and high-temperature stresses for investigating reliability issues. The results reveal that the stress-induced trapping phenomena near two-dimensional electron gas layer should be responsible for the different drain current collapses. The decay level of the DC and the small-signal characteristics increases with the stress voltage and/or the operation temperature. The self-consistent model was established through the de-embedded and the non-linear fitting processes, which can be used to estimate the DC and RF small-signal characteristics degradation under high-drain voltage and high-temperature stress.
Very high density (44 fF/mu m(2)) SrTiO3 MIM capacitors for RF applications
(2007)
Chiang, K. C.
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Lin, J. W.
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Pan, H. C.
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Hsiao, C. N.
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Chen, W. J.
We demonstrate a high-performance TaN/SrTiO3/TaN metal-insulator- metal (MIM) radio-frequency (rf) capacitor with good device integrity of very high capacitance density of 44 fF/mu m(2), small voltage linearity alpha of 54 ppm/V-2 at 2 GHz, and a small capacitance reduction 3.5% from 100 KHz to 10 GHz. Such large capacitance density can largely reduce the device size used in rf integrated circuits. (c) 2007 The Electrochemical Society.
Very low noise in 90nm node RF MOSFETs using a new layout
(2007-01-01)
Kao, H. L.
;
Chin, Albert
;
Liao, C. C.
;
McAlister, S. P.
;
電子工程學系及電子研究所
We have directly measured a record low minimum noise figure (NFmin) of 0.46 dB at 10 GM, along with a high 16.6 dB Associated Gain, in an 8-finger 90 nm node MOSFET (L-G = 65nm) without de-embedding. At 18 GHz, NFmin was 0.83 dB with 13.5 dB gain. This was achieved using a microstrip line layout to screen the RF noise generated by the lossy substrate.