Browsing by Author "Miyamoto, Yasuyuki"

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30-GHz Low-Noise Performance of 100-nm-Gate-Recessed n-GaN/AlGaN/GaN HEMTs
(2010-02-01)
Chang, Chia-Ta
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Kuo, Chien-I
;
Huang, Jui-Chien
We demonstrate a 100-nm-gate-recessed n-GaN/AlGaN/GaN high-electron mobility transistor (HEMT) with low-noise properties at 30 GHz. The recessed GaN HEMT exhibits a low ohmic-contact resistance of 0.28 Omega . mm and a low gate leakage current of 0.9 mu A/mm when biased at V(GS) = -3 V and V(DS) = 10 V. At the same bias point, a minimum noise figure of 1.6 dB at 30 GHz and an associated gain of 5 dB were achieved. To the best of our knowledge, this is the best noise performance reported at 30 GHz for gate-recessed AlGaN/GaN HEMTs.
A 40-nm-Gate InAs/In(0.7)Ga(0.3)As Composite-Channel HEMT with 2200 mS/mm and 500-GHz f(T)
(2009)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Wu, Chien-Ying
;
Chang, Edward Yi
;
Miyamoto, Yasuyuki
A 40-nm T-gate high-electron-mobility-transistor with InAs/In(0.7)Ga(0.3)As composite-channel has been fabricated. The device exhibits a transconductance (g.) of 2200 mS/mm, a cutoff frequency f(T) of 506 GHz and a minimum noise figure of 1.21 dB at a frequency of 58 GHz. These performances make the device well-suited for millimeter-wave or sub-millimeter-wave applications.
A 60-nm-thick enhancement mode In0.65Ga0.35As/InAs/In0.65Ga0.35As high-electron-mobility transistor fabricated using Au/Pt/Ti non-annealed ohmic technology for low-power logic applications
(2016-02)
Fatah, Faiz Aizad
;
Lin, Yueh-Chin
;
Liu, Ren-Xuan
;
Yang, Kai-Chun
;
Lin, Tai-We
A 60-nm-thick E-mode In0.65Ga0.35As/InAs/In0.65Ga0.35As high-electron-mobility transistor (HEMT) was successfully fabricated and evaluated by using Au/Pt/Ti-based non-annealed ohmic technology for high-speed and low-power logic applications. The device exhibited a minimal SS of 69mV/decade, a lower DIBL of 30mV/V, an ION/IOFF ratio above 1.2 x 10(4) at V-DS = 0.5V and a high f(T) of 378GHz and f(max) of 214GHz at V-DS = 1.0V. These results demonstrate that non-annealed ohmic contacts can be used for fabricating E-mode In0.65Ga0.35As/InAs/In0.65Ga0.35As HEMTs with excellent electrical characteristics. The fabricated HEMTs are likely to find use in future high-speed and low-power logic applications. (C) 2016 The Japan Society of Applied Physics.
A Novel Metamorphic High Electron Mobility Transistors with (In(x)Ga(1-x)As)(m)/(InAs)(n) Superlattice Channel Layer for Millimeter-Wave Applications
(2009)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Lu, Jung-Chi
;
Chang, Edward Yi
;
Wu, Chien-Ying
High performance MHEMTs using (In(x)Ga(1-x)As)(m)/(InAs)(n) superlattice structure as a channel layer have been fabricated successfully. These HEMTs with 80 nm gate length exhibit high drain current density of 392 mA/mm at drain bias 1.0 V and transconductance of 991 mS/mm at drain bias 1.2 V. Comparison with regular In(x)Ga(1-x)As channel, the superlattice channel HEMTs show an outstanding performance because of high electron mobility, and better carrier confinement in the (In(x)Ga(1-x)As)(m)/(InAs)(n) channel layer. The current gain cutoff frequency (f(T)) and maximum oscillation frequency (f(max)) were extracted to be 304 GHz and 162 GHz, respectively. The device demonstrated a 0.75 dB noise figure with an associated gain 9.6 dB at 16 GHz. The excellent device performance shows that the superlattice channel can be practically used for high-frequency and millimeter-wave application.
An 80 nm In(0.7)Ga(0.3)As MHEMT with Flip-Chip Packaging for W-Band Low Noise Applications
(2010-01-01)
Wang, Chin-Te
;
Kuo, Chien-I
;
Lim, Wee-Chin
;
Hsu, Li-Han
;
Hsu, Heng-Tung
The fabrication process of an 80 nm In(0.7)Ga(0.3)As MHEMT device with flip-chip packaging on Al(2)O(3) substrate is presented. The flip-chip packaged device exhibited good dc characteristics with high I(DS) = 425 mA/mm and high g(m) = 970 mS/mm at V(DS) = 1.5 V. Besides, the RF performances revealed high gain of 10 dB at 50 GHz and low minimum noise figure (NF(min))below 2 dB at 60 GHz, showing the feasibility of flip-chip packaged In(0.7)Ga(0.3)As MHEMT device for low noise applications at W-band.
An 80 nm In0.7Ga0.3As MHEMT with Flip-Chip Packaging for W-Band Low Noise Applications
(2010-01-01)
Wang, Chin-Te
;
Kuo, Chien-, I
;
Lim, Wee-Chin
;
Hsu, Li-Han
;
Hsu, Heng-Tung
The fabrication process of an 80 nm In0.7Ga0.3As MHEMT device with flip-chip packaging on Al2O3 substrate is presented. The flip-chip packaged device exhibited good dc characteristics with high I-DS = 425 mA/mm and high g(m) = 970 mS/mm at V-DS = 1.5 V. Besides, the RF performances revealed high gain of 10 dB at 50 GHz and low minimum noise figure (NFmin)below 2 dB at 60 GHz, showing the feasibility of flip-chip packaged In0.7Ga0.3As MHEMT device for low noise applications at W-band.
Bias-Dependent Radio Frequency Performance for 40nm InAs High-Electron-Mobility Transistor with a Cutoff Frequency Higher than 600GHz
(2012-11-01)
Fatah, Faiz
;
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Hsu, Ching-Yi
In this paper, we present the fabrication and characterization of 40 nm InAs-channel high-electron-mobility-transistor (HEMT) devices. Both DC and RF measurements were performed under various bias conditions. We have also extracted bias-dependent intrinsic device parameters to determine the optimum conditions of operation. It is concluded that a high current-gain cutoff frequency (f(T)) of 615 GHz can be achieved when the device is biased near the occurrence of impact ionization. (C) 2012 The Japan Society of Applied Physics
DC and RF Performance Improvement of 70 nm Quantum Well Field Effect Transistor by Narrowing Source-Drain Spacing Technology
(2010)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Miyamoto, Yasuyuki
;
Wu, Chien-Ying
A 70 nm InAs channel quantum well field effect transistor (QWFET) fabricated by a narrowing source-drain (S/D) spacing technique was realized for future high-speed and logic applications. The S/D spacing was decreased from 3 to 0.65 mu m through a simple fabrication process, which is an ameliorative redeposition ohmic technique. The drain-source current density and transconductance of the device were increased from 391 to 517 mA/mm and from 946 to 1348 mS/mm after the scaling of the S/D spacing, respectively. In addition, the current gain cutoff frequency (f(T)) was also increased from 185 to 205 GHz. These results show that the easy method can effectively improve the III-V QWFET device performance for high-frequency and high-speed applications. (C) 2010 The Japan Society of Applied Physics
Flip-Chip Packaging of Low-Noise Metamorphic High Electron Mobility Transistors on Low-Cost Organic Substrate
(2011-09-01)
Wang, Chin-Te
;
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Hsu, Li-Han
The rapid growth of high-frequency wireless communication demands high-performance packaging structures at low cost. A flip-chip interconnect is one of the most promising technologies owing to its low parasitic effect and high performance at high frequencies. In this study, the in-house fabricated In(0).(6)Ga(0.4)As metamorphic high electron mobility transistor (mHEMT) device was flip-chip-assembled using a commercially available low-cost organic substrate. The packaged device with the optimal flip-chip structure exhibited almost similar DC and RF results to the bare die. An exopy-based underfill was applied to the improvement of reliability with almost no degradation of the electrical characteristics. Measurement results revealed that the proposed packaging structure maintained a low minimum noise figure of 3 dB with 6 dB associated gain at 62 GHz. Such a superior performance after flip-chip packaging demonstrates the feasibility of the proposed low-cost organic substrate for commercial high-frequency applications up to the W-band. (C) 2011 The Japan Society of Applied Physics
High Perfonnance InAs-Channel HEMT for Low Voltage Milimeter Waive Applications
(2007)
Hsu, Heng-Tung
;
Chang, Chia-Yuan
;
Chang, Edward Yi
;
Ku, Chien-, I
;
Miyamoto, Yasuyuki
An 80-nm InP HEMT with InAs channel and InGaAs sub-channels has been fabricated. The high current gain cutoff frequency (ft) of 350 GHz and maximum oscillation frequency (fmax) of 360 GRz were obtained at VDS = 0.7 V due to the high electron mobility in the InAs channel. DC and RF characterizations on the device have been performed and the on-sate breakdown voltage of the device was measured to be 1.75V. A 2-stage MMIC gain block was designed using such device. A simulated gain of better than 12 dB from 54 GHz to 71 GRz with only 14mW DC power consumption was achieved. Such high performance HEMTs demonstrated in this study shows great potential for very low power millimeter wave applications.
High-performance In0.52Al0.48As/In(0.6)Ga(0.)4As power metamorphic HEMT for Ka-band applications
(2006)
Chang, Chia-Yuan
;
Chang, Edward Yi
;
Lien, Yi-Chung
;
Miyamoto, Yasuyuki
;
Chen, Szu-Hung
A 70-nm In0.52Al0.48As/In0.6Ga0.4As power MHEMT with double delta-doping was fabricated and evaluated. The device has a high transconductance of 827 mS/mm. The saturated drain-source current of the device is 890 mA/mm. A current gain cutoff frequency (f(T)) of 200 GHz and a maximum oscillation frequency of 300 GHz were achieved due to the nanometer gate length and the high Indium content in the channel. When measured at 32 GHz, the 4 x 40 mu m device demonstrates a maximum output power of 14.5 dBm with P1dB of 11.1 dBm and the power gain is 9.5 dB. The excellent DC and RF performance of the 70-nm MHEMT shows a great potential for Ka-band power applications.
High-performance In0.52Al0.48As/In0.6Ga0.4As power metamorphic high electron mobility transistor for Ka-band applications
(2007-06-01)
Chang, Chia-Yuan
;
Chang, Edward Yi
;
Lien, Yi-Chung
;
Miyamoto, Yasuyuki
;
Kuo, Chien-I
A 70nm In0.52Al0.48As/In0.6Ga0.4As power metamorphic high electron mobility transistor (MHEMT) with a double delta-doping structure was fabricated and evaluated. The device has a high transconductance of 827mS/mm. The saturated drain-source current of the device is 890mA/mm. A current gain cutoff frequency (f(T)) of 200GHz and a maximum oscillation frequency (f(max)) of 300GHz were achieved owing to the nanometer gate length and high indium content in the channel. When measured at 32 GHz, the 0.07x160 mu m(2) device demonstrates a maximum output power of 14.5dBm (176mW/mm) and a P I dB of 11.1dBm (80mW/mm) with a 9.5dB power gain. The excellent DC and RF performance of the 70mn MHEMT are comparable to those of InP-based HEMTs and show the great potential for Ka-band power applications.
InAs high electron mobility transistors with buried gate for ultralow-power-consumption low-noise amplifier application
(2008-09-01)
Kuo, Chien-I
;
Hsu, Hen-Tung
;
Chang, Edward Yi
;
Miyamoto, Yasuyuki
;
Tsern, Wen-Chung
An InAs/In(0.3)As composite channel high-electron-mobility transistor (HEMT) fabricated using the gate sinking technique was realized for ultralow-power-consumption low-noise application. The device has a very high transconductance of 100 mS/mm at at drain voltage of 0.5 V. The saturated drain-Source current of the device is 1066 mA/mm. A current grin cutoff frequency (f(T)) of 113 GHz and a maximum oscillation frequency (f(max)) of 110GHz were achieved at only drain bias volume V(ds) = 0.1V. The 0.08 x 40 mu m(2) device demonstrated a minimum noise figure of 0.82 dB and a 14 dB associated gain at 17GHz with 1.14mW DC power consumption.
InAs Thin-Channel High-Electron-Mobility Transistors with Very High Current-Gain Cutoff Frequency for Emerging Submillimeter-Wave Applications
(2013-03-01)
Chang, Edward-Yi
;
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Miyamoto, Yasuyuki
60 nm InAs high-electron-mobility transistors (HEMTs) with a thin channel, a thin InAlAs barrier layer, and a very high gate stem structure have been fabricated and characterized. The thickness of the channel, as well as that of the InAlAs barrier layer, was reduced to 5 nm. A stem height of 250 nm with a Pt-buried gate was used in the device configuration to reduce the parasitics. A high DC transconductance of 2114 mS/mm and a current-gain cutoff frequency (f(T)) of 710 GHz were achieved at V-DS 0.5V. (C) 2013 The Japan Society of Applied Physics
InAs-Channel High-Electron-Mobility Transistors for Ultralow-Power Low Noise Amplifier Applications
(2009-04-01)
Chang, Chia-Yuan
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Miyamoto, Yasuyuki
;
材料科學與工程學系
An InAs-channel high-electron-mobility transistor (HEMT) with an 80 nm gate length for ultralow-power low-noise amplifier (LNA) applications has been fabricated and characterized on a 2-in. InP substrate. Small-signal S-parameter measurements performed on the InAs-channel HEMT at a low drain-source voltage of 0.2 V exhibited an excellent f(T) of 120 GHz and an f(max) of 157 GHz. At an extremely low level of dc power consumption of 1.2 mW, the device demonstrated an associated gain of 9.7 dB with a noise figure of less than 0.8 dB at 12 GHz. Such a device also demonstrated a higher associated gain and a lower noise figure than other InGaAs-channel HEMTs at extremely low dc power consumption. These results indicate the outstanding potential of InAs-channel HEMT technology for ultralow-power space-based radar, mobile millimeter-wave communications and handheld imager applications. (c) 2009 The Japan Society of Applied Physics
InAs-Channel Metal-Oxide-Semiconductor HEMTs with Atomic-Layer-Deposited Al(2)O(3) Gate Dielectric
(2009-01-01)
Chang, Chia-Yuan
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Trinh, Hai-Dang
;
Miyamoto, Yasuyuki
N-type metal-oxide-semiconductor high electron mobility transistor (MOS-HEMT) devices with an InAs-channel using atomiclayer-deposited (ALD) Al(2)O(3) as a gate dielectric have been fabricated and characterized. The device performances of a set of scaled transistors with and without high-k gate dielectric Al(2)O(3) have been compared to determine the optimum device structure for low power and high speed applications. The measurement results revealed that the high performance InAs-channel MOS-HEMTs with the ALD Al(2)O(3) gate dielectric can be achieved if the structure is designed properly. (C) 2009 The Electrochemical Society. [DOI: 10.1149/1.3241014] All rights reserved.
InAs-Channel Metal-Oxide-Semiconductor HEMTs with Atomic-Layer-Deposited Al2O3 Gate Dielectric
(2009-01-01)
Chang, Chia-Yuan
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Trinh, Hai-Dang
;
Miyamoto, Yasuyuki
N-type metal-oxide-semiconductor high electron mobility transistor (MOS-HEMT) devices with an InAs-channel using atomiclayer-deposited (ALD) Al2O3 as a gate dielectric have been fabricated and characterized. The device performances of a set of scaled transistors with and without high-k gate dielectric Al2O3 have been compared to determine the optimum device structure for low power and high speed applications. The measurement results revealed that the high performance InAs-channel MOS-HEMTs with the ALD Al2O3 gate dielectric can be achieved if the structure is designed properly. (C) 2009 The Electrochemical Society. [DOI: 10.1149/1.3241014] All rights reserved.
InAs-Channel Metal-Oxide-Semiconductor HEMTs with Atomic-Layer-Deposited Al2O3 Gate Dielectric
(2009-01-01)
Chang, Chia-Yuan
;
Chang, Edward Yi
;
Huang, Wei-Ching
;
Su, Yung-Hsuan
;
Trinh, Hai-Dang
The performance of n-type metal-oxide-semiconductor HEMTs with an InAs-channel using atomic-layer-deposited Al2O3 as gate dielectric has been fabricated and evaluated. The device performances of a set of scaled transistors with different gate dielectric thicknesses of 3, 5 and 7 nm have been investigated to determine whether the architecture of Al2O3 dielectric on InAs-channel HEMT can demonstrate good properties at low bias conditions for high-speed, high performance CMOS applications. The results indicate that the high-performance InAs-channel MOS-HEMTs with an ALD Al2O3 gate dielectric are promising candidates for advanced post-Si CMOS applications.
Investigation of Impact Ionization from In(x)Ga(1-x)As to InAs Channel HEMTs for High Speed and Low Power Applications
(2008)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Chang, Chia-Ta
;
Chang, Chia-Yuan
80-nm high electron mobility transistors (HEMTs) with different Indium content in In(x)Ga(1-x)As channel from 52%, 70% to 100% have been fabricated. Device performances degradation were observed on the DC measurement and RF characteristics caused by impact ionization at different drain bias, >0.8V (InAs/In(0.7)Ga(0.3)As), > 1V (In(0.7)Ga(0.3)As) and > 1.5V (In(0.52)Ga(0.48)As), respectively. The impact ionization phenomenon should be avoided for high speed, low power application because it limits the highest drain bias of the device which in turn limits the drift velocity under specific applied electric field.
Investigation of impact ionization in InAs-channel HEMT ford high-speed and low-power applications
(2007-10-01)
Chang, Chia-Yuan
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
Kuo, Chien-I
;
Datta, Suman
An 80-nm InP high electron mobility transistor (HEMT) with InAs channel and InGaAs subchannels has been fabricated. The high current gain cutoff frequency (f(t)) of 310 GHz and the maximum oscillation frequency (f(max)) of 330 GHz were obtained at V-DS = 0.7 V due to the high electron mobility in the InAs channel. Performance degradation was observed on the cutoff frequency (f(t)) and the corresponding gate delay time caused by impact ionization due to a low energy bandgap in the InAs channel. DC and RF characterizations on the device have been performed to determine the proper bias conditions in avoidance of performance degradations due to the impact ionization. With the design of InGaAs/InAs/InGaAs composite channel, the impact ionization was not observed until the drain bias reached 0.7 V, and at this bias, the device demonstrated very low gate delay time of 0.63 ps. The high performance of the InAs/InGaAs HEMTs demonstrated in this letter shows great potential for high-speed and very low-power logic applications.