Browsing by Author "WANG, TH"

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AN ULTRA-LOW COST AND MINIATURE 950-2050 MHZ GAAS MMIC DOWNCONVERTER .1. DESIGN APPROACH AND SIMULATION
(1995-05-01)
HSIEH, TH
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WANG, H
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WANG, TH
;
CHEN, TH
;
CHIANG, YC
A miniature ultra low cost 950-2050 MHz GaAs MMIC downconverter has been designed for satellite TV application using a 1-mu m gate-length, ion-implanted GaAs MESFET foundry process. To accurately predict circuit performances, both linear and nonlinear equivalent circuit models have been developed to characterize the RF and de behaviors of device. Modeled simulation results show correspondence with the experimental data. This monolithic downconverter is comprised of an RF LNA, a dual-gate MESFET mixer, an IF variable gain amplifies and a varactor tuned oscillator. The primary design specifications are (1) 50-dB conversion gain, (2) 4-dB noise figure, (3) more than 40-dB gain controllable range, and (4) 50-dBc third-order intermodulation distortion. The chip size is 1.4 x 1.5 x 0.18 mm(3). It is encapsulated in a standard low cost mm plastic package. Moreover, this downconverter IC is promising for miniaturization and cost-reduction of a DBS receiver The detailed measured characteristics will be presented in part-II of this paper.
ANALYSIS OF THE DX TRAPS INDUCED TRANSIENT CHARACTERISTICS IN ALGAAS GAAS HEMTS
(1990-08-01)
WANG, TH
;
YU, CC
;
交大名義發表
;
電控工程研究所
;
National Chiao Tung University
CALCULATION OF HOLE MOBILITY IN DOPED SIGE ALLOYS USING A MONTE-CARLO METHOD WITH A BOND ORBITAL BAND-STRUCTURE
(1994-10-15)
LIOU, TS
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WANG, TH
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CHANG, CY
;
交大名義發表
;
電子工程學系及電子研究所
Hole mobility in strained Si1-xGex/Si(001) layers is calculated as functions of temperature and doping concentration for various Ge contents using a Monte Carlo technique. In the Monte Carlo simulation, the band structure is computed by using a bond orbital model, which combines the k.p and the tight-binding methods with a strain Hamiltonian. The Fermi-Dirac distribution is employed for heavily doped impurity scattering. The alloy interaction potential of 1.0 eV for the Monte Carlo model is obtained by fitting the measured velocity-field characteristics in strained Si1-xGex alloys. The calculated hole mobilities compare well with experimental results. The strain effect on hole transport is also evaluated.
CALCULATION OF THE STRUCTURAL DEPENDENCE OF INFRARED-ABSORPTION IN P-TYPE STRAINED-LAYER SIGE/SI QUANTUM-WELLS
(1995-06-15)
LIOU, TS
;
WANG, TH
;
CHANG, CY
;
交大名義發表
;
電子工程學系及電子研究所
CHARACTERIZATION AND SIMULATION OF HOT CARRIER EFFECT ON ERASING GATE CURRENT IN FLASH EEPROMS
(1995-01-01)
HUANG, CM
;
WANG, TH
;
CHEN, T
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PENG, NC
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CHANG, A
CHARGE LOSS DUE TO AC PROGRAM DISTURBANCE STRESSES IN EPROMS
(1993-09-01)
LIN, JK
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CHANG, CY
;
WANG, TH
;
HUANG, HS
;
CHEN, KL
Charge loss in interpolyoxide erasable programmable read-only memories (EPROMs) due to program disturbance by alternating current pulses applied to the drain was studied for the first time. It was found that the charge loss due to ac stress is more severe than that due to dc stress. Experimental results reveal that the more positive the floating gate potential, the more severe is the drain ac disturbance observed. The main reason for the charge loss is the displacement current which agitates the charges in the floating gate, creating a leakage path from the floating gate to the drain, in which the drain-to-floating-gate overlapping capacitance C(fd) plays an important role. The drain dc stresses of interpolyoxide/nitride/oxide (ONO) EPROMs were also measured under different bias conditions and temperatures. The data show that higher dc electric field of the floating gate to the drain results in larger V(th) shift, which can be accelerated by elevated temperature. In addition, the control gate ac stress-enhanced drain dc disturbance was also measured. We proposed that the dc drain stress is applied during the ac gate stress, which results in a heating effect. The results support the concept of dielectric ac heating.
DEVICE AND CIRCUIT SIMULATION OF ANOMALOUS DX TRAP EFFECTS IN DCFL AND SCFL HEMT INVERTERS
(1993-11-01)
WANG, TH
;
WU, SJ
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HUANG, CM
;
交大名義發表
;
電子工程學系及電子研究所
An integrated device and circuit analysis has been developed to evaluate the DX trap induced anomalous transient phenomena in DCFL and SCFL AlGaAs/GaAs HEMT inverters. The slow transient effect and the hysteretic characteristics of the input-output voltage transfer function in the inverters are simulated. The result shows that in comparison with the DCFL inverter, the DX trap effects are much improved in the SCFL inverter due to its particular operational principle.
EFFECTS OF HOT-CARRIER-INDUCED INTERFACE STATE GENERATION IN SUBMICRON LDD MOSFETS
(1994-09-01)
WANG, TH
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HUANG, CM
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CHOU, PC
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CHUNG, SSS
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CHANG, TE
A two-dimensional numerical simulation including a new interface state generation model has been developed to study the performance variation of a LDD MOSFET after a dc voltage stress. The spatial distribution of hot carrier induced interface states is calculated with a breaking silicon-hydrogen bond model. Mobility degradation and reduction of conduction charge due to interface traps are considered. A 0.6 mum LDD MOSFET was fabricated. The drain current degradation and the substrate current variation after a stress were characterized to compare the simulation. A reduction of the substrate current at V(g) congruent-to 0.5 V(d) in a stressed device was observed from both the measurement and the simulation. Our study reveals that the reduction is attributed to a distance between a maximum channel electric field and generated interface states.
INTERFACE TRAP INDUCED THERMIONIC AND FIELD EMISSION CURRENT IN OFF-STATE MOSFETS
(1994)
WANG, TH
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CHANG, TE
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HUANG, CM
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
INTERFACE-TRAP EFFECT ON GATE INDUCED DRAIN LEAKAGE CURRENT IN SUBMICRON N-MOSFETS
(1994-12-01)
WANG, TH
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HUANG, CM
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CHANG, TE
;
CHOU, JW
;
CHANG, CY
An interface trap assisted tunneling mechanism which includes hole tunneling from interface traps to the valence band and electron tunneling from interface traps to the conduction band is presented to model the drain leakage current in a 0.5 mu m LATID N-MOSFET. In experiment, the interface traps were generated by hot carrier stress, The increased drain leakage current due to the band-trap-band tunneling can be adequately described by an analytical expression of Delta I-d = A exp(-Bit/F) with a value of B-it of 13 MV/cm, which is much lower than that (36 MV/cm) of direct band-to-band tunneling.
INVESTIGATIONS OF COMPLEX-MODES IN A GENERALIZED BILATERAL FINLINE WITH MOUNTING GROOVES AND FINITE CONDUCTOR THICKNESS
(1989-12-01)
WANG, WK
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TZUANG, CK
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CHANG, JS
;
WANG, TH
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交大名義發表
MECHANISMS OF INTERFACE TRAP-INDUCED DRAIN LEAKAGE CURRENT IN OFF-STATE N-MOSFETS
(1995-04-01)
CHANG, TE
;
HUANG, CM
;
WANG, TH
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
An interface trap-assisted tunneling and thermionic emission model has been developed to study an increased drain leakage current in off-state n-MOSFET's after hot carrier stress. In the model a complete band-trap-band leakage path is formed at the Si/SiO2 interface by hole emission from interface traps to a valence band and electron emission from interface traps to a conduction band. Both hole and electron emissions are carried out via quantum tunneling or thermal excitation. In this experiment, a 0.5 mu m n-MOSFET was subjected to a de voltage stress to generate interface traps. The drain leakage current was characterized to compare with the model. Our study reveals that the interface trap-assisted two-step tunneling, hole tunneling followed by electron tunneling, holds responsible for the leakage current at a large drain-to-gate bias (V-dg) The lateral field plays a major role in the two-step tunneling process. The additional drain leakage current due to band-trap-band tunneling is adequately described by an analytical expression Delta I-d = A exp (B-it/F). The value of Bit about 13 mV/cm was obtained in a stressed MOSFET, which is significantly lower than in the GIDL current attributed to direct band-to-band tunneling. As V-dg decreases, a thermionic-field emission mechanism, hole thermionic emission and electron tunneling, becomes a primary leakage path. At a sufficiently low V-dg, our model reduces to the Shockley-Read-Hall theory and thermal generation of electron-hole pairs through traps is dominant.
MIXED-MODE SIMULATION OF DX TRAP-INDUCED SLOW TRANSIENT EFFECTS ON ALGAAS GAAS HEMT INVERTERS
(1991-09-01)
WANG, TH
;
交大名義發表
;
電子工程學系及電子研究所
;
National Chiao Tung University
;
Department of Electronics Engineering and Institute of Electronics
A mixed level device and circuit simulation has been performed to analyze DX trap-induced slow transient effects on the performance degradation of AlGaAs/GaAs HEMT circuits. The variation of the output pulsewidth and the hysteretic characteristics of the input-output voltage transfer function in DCFL HEMT inverters have been simulated. In the model, a DX trap rate equation is calculated in the AlGaAs layer. The self-consistent Schrodinger and Poisson equations are solved numerically at each cross section of a device. A two-region Grebene-Ghandhi model is employed to derive the I-V characteristics. Connections between individual HEMT devices in simulated circuits are treated as nodes of circuit equations. In the simulation, all of the device equations and the circuit equations are iteratively solved until a self-consistent solution is achieved. Our simulation confirms that the output pulse broadening and narrowing effects in a string cascaded DCFL HEMT inverters are a consequence of the inverter voltage transfer function shift caused by deep traps.
MODELING HOT-ELECTRON GATE CURRENT IN SI MOSFETS USING A COUPLED DRIFT-DIFFUSION AND MONTE-CARLO METHOD
(1992-11-01)
HUANG, CM
;
WANG, TH
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CHEN, CN
;
CHANG, MC
;
FU, J
A coupled two-dimensional drift-diffusion and Monte Carlo analysis is developed to study the hot-electron-caused gate leakage current in Si n-MOSFET's. The electron energy distribution in a device is evaluated directly from a Monte Carlo model at low and intermediate electron energies. In the portion of high electron energy where the distribution function cannot be resolved by the Monte Carlo method due to limited computational resources, an extrapolation technique is adopted with an assumption of a Boltzmann tail distribution. This assumption is based on the simulation result that although the distribution function at a high electric field shows a markedly non-Maxwellian feature globally, it has approximately an exponential decay in an energy region much above average electron energy. A particular averaging method is employed to extract the effective electron temperature in the extrapolation. Our result shows that the electron temperature obtained in this approach is about three times lower than that derived from average electron energy by means of [E] = 3/2 kT(e) in the high-field domain of a device. Channel hot electron injection into a gate via quantum tunneling and thermionic emission is simulated. Electron scattering in gate oxide is also taken into account. The calculated values of gate current are in good agreement with experimental results. In the simulation, the most serious hot electron injection occurs about 200-300 angstrom behind the peak of average electron energy due to a delayed heating effect.
NUMERICAL-ANALYSIS OF NONEQUILIBRIUM ELECTRON-TRANSPORT IN ALGAAS/INGAAS/GAAS PSEUDOMORPHIC MODFETS
(1990-09-01)
WANG, TH
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HSIEH, CH
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電控工程研究所
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Institute of Electrical and Control Engineering
POLY(DIMETHYL-CO-DIPHENYLSILANE) AS A DEEP-UV AND AN OXYGEN PLASMA PORTABLE CONFORMABLE MASK
(1992-08-01)
LOONG, WA
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WANG, TH
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交大名義發表
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應用化學系
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National Chiao Tung University
Bi-layer resist processes for deep-UV and oxygen plasma are studied. Poly(dimethyl-co-diphenylsilane) is used as both deep-UV and oxygen plasma portable conformable masks because of its strong deep-UV and i-line (365 nm) absorption and its resistance to oxygen plasma. The bottom layer is P(MMA-PhPK), a copolymer of methylmethacrylate and 30 wt% of phenylpropenylketone, for the positive-tone pattern. P(MMA-PhPK) has greater deep-UV exposure sensitivity compared to PMMA. Good vertical sidewall profiles of lines of bottom layers are obtained.
QUANTUM CONFINEMENT EFFECTS ON LOW-DIMENSIONAL ELECTRON-MOBILITY
(1993-07-01)
WANG, TH
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HSIEH, TH
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CHEN, TW
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交大名義發表
;
電子工程學系及電子研究所
A study of quantum confinement effects on the low-dimensional electron mobility in various AlGaAs/GaAs quantum well/wire structures has been performed. The influence of the electron envelop wave function and the subband structure on the low-dimensional electron scattering rates is evaluated. The electron transport behavior is studied through a Monte Carlo simulation. The result shows that the low-dimensional electron mobility varies significantly with the quantum well/wire geometry. The one-dimensional electron mobility of 9200 cm2/V s is obtained in a rectangular quantum wire with a geometry of 110 angstrom X 110 angstrom. This value is much improved in comparison with the bulk electron mobility of 8000 cm2/V s in intrinsic GaAs and the maximum two-dimensional electron mobility of 8600 cm2/V s in a 120 angstrom GaAs quantum well. It is also noticed that the highest low-dimensional electron mobility is achieved in a quantum well/wire structure where the energy separation between the first subband and the second subband is about two polar optical phonon energy.
QUANTUM-WELL GEOMETRICAL EFFECTS ON 2-DIMENSIONAL ELECTRON-MOBILITY
(1992-11-01)
WANG, TH
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HSIEH, TH
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CHEN, YT
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交大名義發表
;
電控工程研究所
A Monte Carlo analysis to study the quantization effects on the low-field electron mobility in various AlGaAs/GaAs/AlGaAs quantum well structures has been performed. The influence of the electron envelop wave-function and the subband structure on the two-dimensional electron scattering rates was evaluated. Our results showed that a maximum two-dimensional electron mobility can be achieved in a quantum well structure where the energy difference between the first subband and the second subband is about two times the polar optical phonon energy.
STRUCTURAL EFFECT ON BAND-TRAP-BAND TUNNELING INDUCED DRAIN LEAKAGE IN N-MOSFETS
(1995-12-01)
WANG, TH
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CHANG, TE
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HUANG, CM
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YANG, JY
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CHANG, KM
The structural dependence of the hot carrier stress incurred drain leakage current via band-trap-band tunneling in off-state has been modeled and characterized in conventional S/D, DDD, and LDD n-MOSFET structures, The results shows that lateral field enhanced band-trap-band tunneling is primarily responsible for an increased drain leakage current after hot carrier stress in LDD structures while vertical field induced tunneling is dominant in conventional S/D and DDD structures.
TRANSIENT SIMULATION OF EPROM WRITING CHARACTERISTICS, WITH A NOVEL HOT-ELECTRON INJECTION MODEL
(1995-02-01)
HUANG, CM
;
WANG, TH
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交大名義發表
;
電子工程學系及電子研究所
;
National Chiao Tung University
A two-dimensional transient simulation of EPROM writing characteristics is presented. A Monte Carlo-based hot electron injection model which accounts for Fowler-Nordheim tunneling and thermionic emission has been included in the simulation. The simulated EPROM writing transient characteristics is compared favorably with experimental results for channel lengths down to 0.5 mu m. The importance of the two injection mechanisms, thermionic emission and quantum tunneling, is evaluated.