Browsing by Author "YEH, CF"

Now showing 1 - 20 of 20

BOND-STRUCTURE CHANGES OF LIQUID-PHASE DEPOSITED OXIDE (SIO2-XFX) ON N2 ANNEALING
(1995-02-20)
YEH, CF
;
CHEN, CL
;
LUR, W
;
YEN, PW
;
電子工程學系及電子研究所
CHARACTERISTICS OF SELF-INDUCED LIGHTLY-DOPED-DRAIN POLYCRYSTALLINE SILICON THIN-FILM TRANSISTORS WITH LIQUID-PHASE DEPOSITION SIO2 AS GATE-INSULATOR AND PASSIVATION-LAYER
(1995-02-01)
YEH, CF
;
YANG, TZ
;
CHEN, TJ
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
As the passivation layer on the top of undoped offset region for offset-gate structured poly-Si TFTs is exposed to hydrogen plasma, a lightly-doped-like drain region could be equivalently self-induced. The hydrogenated polycrystalline silicon thin-film transistor of this structure, named self-induced Lightly-doped-drain (SI-LDD) poly-Si TFTs, was first developed with liquid-phase deposition oxide as both the gate insulator and the passivation layer. This paper describes the optimum hydrogenation condition, and the electrical characteristics for the novel SI-LDD poly-Si TFTs. The effects of DC electrical stress on SI-LDD poly-Si TFTs are also described. Finally a model is proposed to explain the degradation phenomena observed in our SI-LDD devices.
CHARACTERIZATION OF THE CHEMICAL-MECHANICAL POLISHING PROCESS-BASED ON NANOINDENTATION MEASUREMENT OF DIELECTRIC FILMS
(1995-09-01)
LIU, CW
;
DAI, BT
;
YEH, CF
;
電子工程學系及電子研究所
;
奈米中心
To better understand variations in the rate at which material is removed from a wafer during chemical-mechanical polishing (CMP), knowledge of the mechanical properties of the wafer surface is required. The nanoscale mechanical. properties of undoped dielectric films were investigated using the nanoindentation technique. Crack resistance examined from the loading curve suggested that precursor cracks for SiH4-atmospheric pressure chemical deposition films with a tensile stress, as compared with other dielectric films with compressive stresses, appeared in the earlier stage of indentation. The hardness of dielectric films determined from the unloading curve could be considerably dependent on the film's preparation methods. Correlation between the Si-O bond densities and hardness were also studied. Experimental results showed that there was a Linear relationship between the surface hardness and the removal rates of the undoped dielectric films under a well-controlled CMP process.
CONTROLLING FLUORINE CONCENTRATION AND THERMAL ANNEALING EFFECT ON LIQUID-PHASE DEPOSITED SIO2-XFX FILMS
(1995-10-01)
YEH, CF
;
CHEN, CL
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Silicon oxide (SiO2-xFx) with fluorine naturally incorporated can be prepared by the liquid-phase deposition (LPD) method at 15 degrees C. The fluorine is uniformly distributed in the bulk of the LPD oxide. The fluorine incorporation as well as the qualitative properties can be accurately controlled by varying the amount of H2O added. A high temperature process has considerable effect on the low temperature fluorinated oxide. FTIR and XPS spectra show that Si-F and SiO-H bonds can restructure with densification at higher thermal annealing temperature, and that restructuring is a function of temperature. Film densification with increasing temperature is also discussed in terms of Si-O-Si bond angle and Si-Si bond length.
EFFECTS OF PLASMA TREATMENT ON THE PROPERTIES OF ROOM-TEMPERATURE LIQUID-PHASE DEPOSITED (LPD) OXIDE-FILMS
(1995-07-01)
YEH, CF
;
LIN, SS
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Effects of plasma treatment including H-2 or O-2 On the properties of LPD oxide were investigated. After plasma treatment, the physicochemical characteristics of LPD oxide films were greatly improved. No matter whether with H-2 or O-2 plasma treatment, the LPD oxide film exhibited higher refractive index and lower P-etch rate than as-deposited films. The electrical characteristics were also improved. This indicates that plasma treatment can effectively passivate the vacancies in LPD oxide. It was also found that the treatment using O-2 source was better than using H-2. This was the same as for the case of thermal annealing. Because the plasma treated LPD oxide exhibited superior results to the thermally annealed one and the temperature in plasma treatment was much lower than that in thermal annealing, plasma treatment is more suitable for improving the characteristics of LPD oxide films.
EXPERIMENTAL COMPARISON OF OFF-STATE CURRENT BETWEEN HIGH-TEMPERATURE-PROCESSED AND LOW-TEMPERATURE-PROCESSED UNDOPED CHANNEL POLYSILICON THIN-FILM TRANSISTORS
(1993-10-01)
YEH, CF
;
YANG, TZ
;
CHEN, CL
;
CHEN, TJ
;
YANG, YC
Poly-Si thin-film transistors (TFT's) have a large off -state current that is unacceptable for pixel river application. To quickly establish an effective solution to reduce the off-state current, systematic comparison and clarification of the mechanisms of off-state current are still insufficient. We will concentrate on an experimental comparison of off -state current mechanisms between low-temperature-processed (LTP) and high-temperature-processed (HTP) poly-Si TFT devices. Since all the off-state currents are found to be divided into three regions in LTP and HTP poly-Si TFT's, they are attributable to a resistive current in region I (low gate bias), pure thermal generation in region II (low drain bias) and Frenkel-Poole emission in region III (high gate bias, drain bias).
FABRICATION OF MOSFETS USING LOW-TEMPERATURE LIQUID-PHASE DEPOSITED OXIDE
(1995-06-01)
YEH, CF
;
LIN, SS
;
HONG, TY
;
交大名義發表
;
電子工程學系及電子研究所
Low-temperature, high quality liquid-phase deposition (LPD) oxide was developed. The MOSFETs with such a new LPD oxide as gate insulators were investigated. The electrical characteristics, including threshold voltage of 2.1 Volts, peak effective mobility (mu(FE)) Of 580 cm(2)/V . s, and subthreshold swing of 134 mV/decade, show the devices exhibit comparable performance to other low-temperature processed MOSFETs. This demonstrates that LPD oxide can be an suitable candidate for future gate insulators in low-temperature processed MOSFETs.
IMPROVED IV-CHARACTERISTICS OF POLYSILICON THIN-FILM TRANSISTORS WITH NOVEL DUAL-BUFFER DRAIN STRUCTURE
(1994-01-01)
YEH, CF
;
CHERN, CH
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
ON/OFF current ratio of poly-Si TFTs has been improved by using a novel structure called the dual-buff er drain (DBD). The new DBD TFT not only reduces the anomalous off-current, but also maintains a high on-current. It mainly combines features of the double-gate and the field-induced drain structures, so that owns advantages of low electric field near the drain junction and good drain junction characteristics. Furthermore, it will be shown that the DBD TFT is superior in off-current stability to the FID TFT. Finally, we will discuss high voltage operation for the DBD TFT.
INVESTIGATION OF SI-SIO2 INTERFACE PROPERTIES FOR BONDED SILICON-ON-INSULATOR
(1993-10-01)
YEH, CF
;
KAO, HW
;
CHANG, BS
;
CHANG, KL
;
交大名義發表
INVESTIGATION OF THERMAL COEFFICIENT FOR POLYCRYSTALLINE SILICON THERMAL SENSOR DIODE
(1992-02-01)
YEH, CF
;
LIN, SS
;
YANG, GP
;
交大名義發表
;
電控工程研究所
Thermal sensors utilizing p-n junction diodes built into the polycrystalline silicon layer are developed. The effective factors influencing the thermal coefficient of polycrystalline silicon thermal sensor diodes are clarified. It is found that diodes with a light boron dose have a larger thermal coefficient than those with a heavy boron dose. The plural p-n diodes connected with more cascade series number have a larger thermal coefficient than ones with less cascade series number. The periphery of the thermal sensor seems to have little effect on the thermal coefficient. In addition, the thermal coefficient will become higher as a larger forward current is selected. The thermal coefficient of the sensor with a boron dose of 1 x 10(15) cm-2 will reach a saturation value of -2 mV/K when the forward current is above 2-mu-A.
LOW-TEMPERATURE PROCESSED MOSFETS WITH LIQUID-PHASE DEPOSITED SIO2-XFX AS GATE INSULATOR
(1995-07-01)
YEH, CF
;
LIN, SS
;
HONG, TY
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Device performances of MOSFET's with SiO2-xFx gate oxides prepared by an extremely low-temperature (15 degrees C) liquid phase deposition (LPD) method were investigated. The electrical characteristics, including threshold voltage of 2.1 V, peak effective mobility (mu(eff)) of 525 cm(2)V . s, and subthreshold suing of 134 mV/decade, show the devices exhibit comparable performance to other low-temperature processed MOSFET's. This demonstrates that LPD SiO2-xFx can be a suitable candidate for future gate insulators in low-temperature processed MOSFET's.
LOW-TEMPERATURE-PROCESSED POLY-SI THIN-FILM TRANSISTORS USING SOLID-PHASE-CRYSTALLIZED AND LIQUID-PHASE-DEPOSITED GATE OXIDE
(1994-04-01)
YEH, CF
;
CHEN, CL
;
YANG, YC
;
LIN, SS
;
YANG, TZ
Poly-Si thin-film transistor (TFT) devices using solid-phase-crystallized and liquid-phase-deposited gate oxide are, for the first time, realized by low-temperature processes (LTP) (<625-degrees-C) for future LCDs and 3-D integrated circuits. The method of liquid-phase deposition of SiO2 (LPD-SiO2) is described. The physical, chemical and electrical properties of the new dielectric layer are clarified. The TFT (W/L = 200 mum/10 mum) having an on-off current ratio of 10(6) at V(D) = 5 V, a field-effect mobility of 15 cm2/V.s at V(D) = 0.1 V, a threshold voltage of 5.6 V, and a subthreshold swing of 1.6 V/decade, exhibits sufficient performance for pixel transistors. The field-effect mobility is strongly dependent on channel length. Effective passivation of defects by plasma hydrogenation will be very essential to achieve higher performance.
NOVEL TECHNIQUE FOR SIO2 FORMED BY LIQUID-PHASE DEPOSITION FOR LOW-TEMPERATURE PROCESSED POLYSILICON TFT
(1993-08-01)
YEH, CF
;
LIN, SS
;
CHEN, CL
;
YANG, YC
;
電控工程研究所
A novel technique for SiO2 formation by liquid-phase deposition (LPD) at nearly room temperature for low-temperature processed (LTP) polysilicon thin-film transistor (poly-Si TFT) was developed. LPD-SiO2 film with a lower P-etch rate shows its dense structure. LPD-SiO2 also exhibits good electrical characteristics. LTP poly-Si TFT's with LPD-SiO2, as gate insulator have been fabricated and investigated. Their characteristics exhibit sufficient performance for pixel transistor in liquid crystal display (LCD).
PERFORMANCE AND OFF-STATE CURRENT MECHANISMS OF LOW-TEMPERATURE PROCESSED POLYSILICON THIN-FILM TRANSISTORS WITH LIQUID-PHASE DEPOSITED SIO2 GATE INSULATOR
(1994-02-01)
YEH, CF
;
LIN, SS
;
YANG, TZ
;
CHEN, CL
;
YANG, YC
Polysilicon thin-film transistors (poly-Si TFT's) with liquid phase deposition (LPD) silicon dioxide (SiO2) gate insulator were realized by low-temperature processes (< 620-degrees-C). The physical, chemical, and electrical properties of the new dielectric layer were clarified. The low-temperature processed (LTP) polylayer TFT's with W/L = 200 mum/10 mum had an on-off current ratio of 4.95 x 10(6) at V(D) = 5 V, a field effect mobility of 25.5 cm2/V.s at V(D) = 0.1 V, a threshold voltage of 6.9 V. and a subthreshold swing of 1.28 V/decade at V(D) = 0.1 V. Effective passivation of defects by plasma hydrogenation can improve the characteristics of the devices. The off-state current (I(L)) mechanisms of the tTP poly-Si TFT's were systematically compared and clarified. The I(L) is divided into three regions; the I(L) is attributable to a resistive current in region I (low gate bias), to pure thermal generation current in region II (low drain bias), and to Frenkel-Poole emission current in region III (high gate bias and drain bias).
ROOM-TEMPERATURE SELECTIVE GROWTH OF DIELECTRIC FILMS BY LIQUID-PHASE DEPOSITION
(1994-06-01)
YEH, CF
;
CHEN, CL
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In multilevel interconnection processes, because thermal stress affects device characteristics and wiring reliability, low-temperature deposition has been required for interlayer dielectrics (SiO2). This research investigated high growth rate and selective growth conditions of room-temperature interlayer dielectrics formed using the liquid-phase deposition method. The dependence of deposition rate on growth temperature and H3BO3 concentration is confirmed, and a concentration of 3.8 mol l-1 of H2SiF6 is used to achieve a high deposition rate of 1250 angstrom h-1. The degree of supersaturation of silica of the immersing solution is found to define three ranges of growth conditions: the non-deposition range, selective deposition range, and conformal deposition range. A selective deposition model is proposed to clarify the mechanism of room-temperature selective SiO2 growth,
THE CHARACTERIZATION OF AL2O3 PREPARED BY ANODIC-OXIDATION
(1993-06-01)
YEH, CF
;
CHENG, JY
;
LU, JH
;
交大名義發表
;
電控工程研究所
Aluminum is a good candidate of low resistivity metal as a gate electrode metal and a gate bus-line metal in amorphous silicon thin-film transistor of liquid crystal display. But it easily brings about hillocks and whiskers during the heat process, and causes defects. Al2O3 formed on aluminum layer is expected to work as a protective layer against hillock formation. The formation of Al2O3 is developed by anodic oxidation method. The electrical characteristics of Al2O3 layers formed at constant DC anodic bias or constant DC current density were investigated. The optimal growth condition of Al2O3 has been developed. In addition, the double-layer of Al2O3/SiN is also shown to be sufficiently protective against hillock formation.
THE EFFECT OF TEMPERATURE ON I-V-CHARACTERISTICS OF A-SI-H PHOTODIODE
(1992-09-01)
CHANG, KL
;
YEH, CF
;
交大名義發表
;
電控工程研究所
;
National Chiao Tung University
A 16-bit/mm, high-resolution, Schottky a-Si:H photodiode linear sensor array was fabricated, and the effect of temperature on its I-V characteristics was studied. Annealing the a-Si:H photodiodes at 200-degrees-C in air for 30 minutes lowered the dark current and improved the I(p)/I(d). Under reverse bias, the dark current increased with temperature and doubled for every 8.89-degrees-C rise, while the photocurrent showed few effects below 100-degrees-C.
THE NOVEL PREPARATION OF P-N-JUNCTION MESA DIODES BY SILICON-WAFER DIRECT BONDING (SDB)
(1992-05-01)
YEH, CF
;
SHYANG, HL
;
電控工程研究所
;
光電工程學系
;
Institute of Electrical and Control Engineering
The key processes of silicon-wafer direct bonding (SDB), including hydrophilic surface formation and optimal two-step heat treatment, have been developed However, H2SO4/H2O2 solution being a strong oxidized acid solution, native oxide is found to have grown on the wafer surface as soon as a wafer is treated in this solution. In the case of a wafer further treated in diluted HF solution after hydrophilic surface formation, it is shown that the wafer surface can not only be cleaned of its native oxide but also remains hydrophilic, and can provide excellent voidless bonding. The N+/P and N/P combination junction mesa diodes fabricated on the wafers prepared by these novel SDB technologies are examined. The ideality factor n of the N/P mesa diode is 2.4 approximately 2.8 for the voltage range 0.2 approximately 0.3 V; hence, the lowering of the ideality factor n is evidently achieved. As for the N+/P mesa diode, the ideality factor n shows a value of 1.10 approximately 1.30 for the voltage range 0.2 approximately 0.6 V; the low value of n is attributed to an autodoping phenomenon which has caused the junction interface to form in the P-silicon bulk. However, the fact that the sustaining voltage of the N/P mesa diode showed a value greater than 520 V reveals the effectiveness of our novel SDB processes.
THE PHYSICOCHEMICAL PROPERTIES AND GROWTH-MECHANISM OF OXIDE (SIO2-XFX) BY LIQUID-PHASE DEPOSITION WITH H2O ADDITION ONLY
(1994-11-01)
YEH, CF
;
CHEN, CL
;
LIN, GH
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Silicon oxide formation was studied by a novel liquid phase deposition (LPD) method with H2O addition only at 35-degrees-C. The deposition rate could be controlled by varying the quantity of H2O added. The LPD-oxide was lightly oxygen-deficient. FTIR spectra and AES depth profiles indicate that a small amount of fluorine was incorporated into the oxide. The composition of LPD-oxide can be represented as SiO2-xFx. The physicochemical properties of LPD oxide were investigated, as was the behavior of fluorine in the oxide and the chemical reaction. A model for the LPD mechanism is proposed that satisfactorily explains all of the experimental phenomena observed.
THINNER LIQUID-PHASE DEPOSITED OXIDE FOR POLYSILICON THIN-FILM TRANSISTORS
(1995-11-01)
YEH, CF
;
LIN, SS
;
FAN, CL
;
交大名義發表
;
電子工程學系及電子研究所
To scale down the gate insulator thickness of polysilicon thin-film transistors (poly-Si TFT's), a thinner oxide is developed by liquid-phase deposition with a small quantity, of H2O added, producing a rather high-quality oxide. Poly-Si TFT with such a thin oxide reveals good performances in electric characteristics. Thus, the novel thinner oxide is a good candidate as a poly-Si TFT gate insulator in the near future.