1. 目前位置：

瀏覽 的方式： 作者 Chao, Mango C. -T.

跳到： 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字：  
顯示 21 到 40 筆資料，總共 44 筆 < 上一頁   下一頁 >
公開日期標題作者
1-十二月-2011A Novel Test Flow for One-Time-Programming Applications of NROM TechnologyChao, Mango C. -T.; Chin, Ching-Yu; Tsou, Yao-Te; Chang, Chi-Min; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A Novel Test Flow for One-Time-Programming Applications of NROM TechnologyChin, Ching-Yu; Tsou, Yao-Te; Chang, Chi-Min; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Power-Switch Routing for Reducing Dynamic IR Drop in Multi-Domain MTCMOS DesignsWang, Yi-Ming; Chao, Mango C. -T.; Chen, Shi-Hao; Li, Hung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2013Power-Up Sequence Control for MTCMOS DesignsChen, Shi-Hao; Lin, Youn-Long; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2014Practical Routability-Driven Design Flow for Multilayer Power Networks Using Aluminum-Pad LayerChang, Wen-Hsiang; Chao, Mango C. -T.; Chen, Shi-Hao; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2014Practical Routability-Driven Design Flow for Multilayer Power Networks Using Aluminum-Pad LayerChang, Wen-Hsiang; Chao, Mango C. -T.; Chen, Shi-Hao; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2016Predicting Shot-Level SRAM Read/Write Margin Based on Measured Transistor CharacteristicsBin, Shu-Yung; Lin, Shih-Feng; Cheng, Ya-Ching; Liau, Wen-Rong; Hou, Alex; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016Predicting V-t Mean and Variance from Parallel I-d Measurement with Model-Fitting TechniqueTsai, Chih-Ying; Lee, Kao-Chi; Lin, Chien-Hsueh; Yu, Sung-Chu; Liau, Wen-Rong; Hou, Alex Chun-Liang; Chen, Ying-Yen; Kuo, Chun-Yi; Lee, Jih-Nung; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2017Predicting Vt Variation and Static IR Drop of Ring Oscillators Using Model-Fitting TechniquesHuang, Tzu-Hsuan; Hung, Wei-Tse; Yang, Hao-Yu; Chang, Wen-Hsiang; Chen, Ying-Yen; Kuo, Chun-Yi; Lee, Jih-Nung; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015Random Pattern Generation for Post-Silicon Validation of DDR3 SDRAMYang, Hao-Yu; Kuo, Shih-Hua; Huang, Tzu-Hsuan; Chen, Chi-Hung; Lin, Chris; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2010Scan-Cell Reordering for Minimizing Scan-Shift Power Based on Nonspecified Test CubesWu, Yu-Ze; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2010Scan-Cell Reordering for Minimizing Scan-Shift Power Based on Nonspecified Test CubesWu, Yu-Ze; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2008Scan-chain reordering for minimizing scan-shift power based on non-specified test cubesWu, Yu-Ze; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
五月-2016Statistical Framework and Built-In Self-Speed-Binning System for Speed Binning Using On-Chip Ring OscillatorsMu, Szu-Pang; Chao, Mango C. -T.; Chen, Shi-Hao; Wang, Yi-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016Statistical Methodology to Identify Optimal Placement of On-Chip Process Monitors for Predicting FmaxMu, Szu-Pang; Chang, Wen-Hsiang; Chao, Mango C. -T.; Wang, Yi-Ming; Chang, Ming-Tung; Tsai, Min-Hsiu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015Statistical Techniques for Predicting System-Level Failure using Stress-Test DataChen, Harry H.; Kuo, Shih-Hua; Tung, Jonathan; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2012Testing Methodology of Embedded DRAMsYang, Hao-Yu; Chang, Chi-Min; Chao, Mango C. -T.; Huang, Rei-Fu; Lin, Shih-Chin; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
2008Testing Methodology of Embedded DRAMsChang, Chi-Min; Chao, Mango C. -T.; Huang, Rei-Fu; Chen, Ding-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014Testing Methods for a Write-Assist Disturbance-Free Dual-Port SRAMYang, Hao-Yu; Lin, Chen-Wei; Huang, Chao-Ying; Lu, Ching-Ho; Lai, Chen-An; Chao, Mango C. -T.; Huang, Rei-Fu; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
2010Testing Methods for Detecting Stuck-open Power Switches in Coarse-Grain MTCMOS DesignsMu, Szu-Pang; Wang, Yi-Ming; Yang, Hao-Yu; Chao, Mango C. -T.; Chen, Shi-Hao; Tseng, Chih-Mou; Tsai, Tsung-Ying; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 21 到 40 筆資料，總共 44 筆 < 上一頁   下一頁 >