標題: | A Novel Test Flow for One-Time-Programming Applications of NROM Technology |
作者: | Chao, Mango C. -T. Chin, Ching-Yu Tsou, Yao-Te Chang, Chi-Min 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | NROM;repair rate estimation;test flow |
公開日期: | 1-十二月-2011 |
摘要: | The NROM technology is an emerging non-volatile-memory technology providing high data density with low fabrication cost. In this paper, we propose a novel test flow for the one-time-programming (OTP) applications using the NROM bit cells. Unlike the conventional test flow, the proposed flow applies the repair analysis in its package test instead of in its wafer test, and hence creates a chance for reusing the bit cells originally identified as a defect to represent the value in the OTP application. Thus, the proposed test flow can reduce the number of bit cells to be repaired and further improve the yield. Also, we propose an efficient and effective estimation scheme to predict the probability of a part being successfully repaired before packaged. This estimation can be used to determine whether a part should be packaged, such that the total profit of the proposed test flow can be optimized. A series of experiments are conducted to demonstrate the effectiveness, efficiency, and feasibility of the proposed test flow. |
URI: | http://dx.doi.org/10.1109/TVLSI.2010.2087044 http://hdl.handle.net/11536/14628 |
ISSN: | 1063-8210 |
DOI: | 10.1109/TVLSI.2010.2087044 |
期刊: | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS |
Volume: | 19 |
Issue: | 12 |
起始頁: | 2170 |
結束頁: | 2183 |
顯示於類別: | 期刊論文 |