瀏覽 的方式: 作者 Du, Jieqiong

跳到: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字:  
顯示 3 到 7 筆資料,總共 7 筆 < 上一頁 
公開日期標題作者
1-十一月-2018A 2-GS/s 8-Bit ADC Featuring Virtual-Ground Sampling Interleaved Architecture in 28-nm CMOSWang, X. Shawn; Jin, Xin; Du, Jieqiong; Li, Yilei; Du, Yuan; Wong, Chien-Heng; Kuan, Yen-Cheng; Chan, Chi-Hang; Chang, Mau-Chung Frank; 電子工程學系及電子研究所; 國際半導體學院; Department of Electronics Engineering and Institute of Electronics; International College of Semiconductor Technology
2016A 38mW 40Gb/s 4-Lane Tri-Band PAM-4 / 16-QAM Transceiver in 28nm CMOS for High-Speed Memory InterfaceCho, Wei-Han; Li, Yilei; Du, Yuan; Wong, Chien-Heng; Du, Jieqiong; Huang, Po-Tsang; Lee, Sheau Jiung; Chen, Huan-Neng; Jou, Chewn-Pu; Hsueh, Fu-Lung; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University
1-一月-2019A 7.5-mW 10-Gb/s 16-QAM Wireline Transceiver with Carrier Synchronization and Threshold Calibration for Mobile Inter-chip Communications in 16-nm FinFETDu, Jieqiong; Wong, Chien-Heng; Tu, Yo-Hao; Cho, Wei-Han; Li, Yilei; Du, Yuan; Huang, Po-Tsang; Lee, Sheau-Jiung; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University
1-一月-2018An 8.8-GS/s 8b Time-Interleaved SAR ADC with 50-dB SFDR Using Complementary Dual-Loop-Assisted Buffers in 28nm CMOSWang, X. Shawn; Chan, Chi-Hang; Du, Jieqiong; Wong, Chien-Heng; Li, Yilei; Du, Yuan; Kuan, Yen-Cheng; Hu, Boyu; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University
1-十月-2019An Analog Neural Network Computing Engine Using CMOS-Compatible Charge-Trap-Transistor (CTT)Du, Yuan; Du, Li; Gu, Xuefeng; Du, Jieqiong; Wang, X. Shawn; Hu, Boyu; Jiang, Mingzhe; Chen, Xiaoliang; Iyer, Subramanian S.; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University