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公開日期標題作者
24-十一月-2017Internal current amplification induced by dielectric hole trapping in monolayer MoS2 transistorLiu, Pang-Shiuan; Lin, Ching-Ting; Hudec, Boris; Hou, Tuo-Hung; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
8-九月-2017Large-Area 2D Layered MoTe2 by Physical Vapor Deposition and Solid-Phase Crystallization in a Tellurium-Free AtmosphereHuang, Jyun-Hong; Deng, Kuang-Ying; Liu, Pang-Shiuan; Wu, Chien-Ting; Chou, Cheng-Tung; Chang, Wen-Hao; Lee, Yao-Jen; Hou, Tuo-Hung; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
六月-2016Large-area few-layer MoS2 deposited by sputteringHuang, Jyun-Hong; Chen, Hsing-Hung; Liu, Pang-Shiuan; Lu, Li-Syuan; Wu, Chien-Ting; Chou, Cheng-Tung; Lee, Yao-Jen; Li, Lain-Jong; Chang, Wen-Hao; Hou, Tuo-Hung; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
2013Low-Cost Embedded RRAM Technology for System-on-Plastic Integration Using a-IGZO TFTsHou, Tuo-Hung; Wu, Shih-Chieh; Yu, Ming-Jiue; Liu, Pang-Shiuan; Chi, Li-Jen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2015Optically initialized robust valley-polarized holes in monolayer WSe2Hsu, Wei-Ting; Chen, Yen-Lun; Chen, Chiang-Hsiao; Liu, Pang-Shiuan; Hou, Tuo-Hung; Li, Lain-Jong; Chang, Wen-Hao; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
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