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公開日期標題作者
1-三月-1992AN ANALYTICAL THRESHOLD-VOLTAGE MODEL OF TRENCH-ISOLATED MOS DEVICES WITH NONUNIFORMLY DOPED SUBSTRATESCHUNG, SSS; LI, TC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-1989A CHARGE-BASED CAPACITANCE MODEL OF SHORT-CHANNEL MOSFETSCHUNG, SSS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-1990A COMPLETE MODEL OF THE IV CHARACTERISTICS FOR NARROW-GATE MOSFETSCHUNG, SSS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-1994DIRECT OBSERVATION OF CHANNEL-DOPING-DEPENDENT REVERSE SHORT-CHANNEL EFFECT USING DECOUPLED C-V TECHNIQUEGUO, JC; HSU, CCH; CHUNG, SSS; 電控工程研究所; Institute of Electrical and Control Engineering
1-九月-1994EFFECTS OF HOT-CARRIER-INDUCED INTERFACE STATE GENERATION IN SUBMICRON LDD MOSFETSWANG, TH; HUANG, CM; CHOU, PC; CHUNG, SSS; CHANG, TE; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
1-九月-1989AN EFFICIENT SEMI-EMPIRICAL MODEL OF THE IV CHARACTERISTICS FOR LDD MOSFETSCHUNG, SSS; LIN, TS; CHEN, YG; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-1993A NEW APPROACH TO DETERMINE THE DRAIN-AND-SOURCE SERIES RESISTANCE OF LDD MOSFETSCHUNG, SSS; LEE, JS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-1995TRANSCONDUCTANCE ENHANCEMENT DUE TO BACK BIAS FOR SUBMICRON NMOSFETGUO, JC; CHANG, MC; LU, CY; HSU, CCH; CHUNG, SSS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-1993A UNIFIED 3-D MOBILITY MODEL FOR THE SIMULATION OF SUBMICRON MOS DEVICESYANG, JJ; CHUNG, SSS; CHANG, CH; LEE, GH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 9 筆資料，總共 9 筆