標題: | EFFECTS OF HOT-CARRIER-INDUCED INTERFACE STATE GENERATION IN SUBMICRON LDD MOSFETS |
作者: | WANG, TH HUANG, CM CHOU, PC CHUNG, SSS CHANG, TE 交大名義發表 電子工程學系及電子研究所 National Chiao Tung University Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-九月-1994 |
摘要: | A two-dimensional numerical simulation including a new interface state generation model has been developed to study the performance variation of a LDD MOSFET after a dc voltage stress. The spatial distribution of hot carrier induced interface states is calculated with a breaking silicon-hydrogen bond model. Mobility degradation and reduction of conduction charge due to interface traps are considered. A 0.6 mum LDD MOSFET was fabricated. The drain current degradation and the substrate current variation after a stress were characterized to compare the simulation. A reduction of the substrate current at V(g) congruent-to 0.5 V(d) in a stressed device was observed from both the measurement and the simulation. Our study reveals that the reduction is attributed to a distance between a maximum channel electric field and generated interface states. |
URI: | http://dx.doi.org/10.1109/16.310115 http://hdl.handle.net/11536/2333 |
ISSN: | 0018-9383 |
DOI: | 10.1109/16.310115 |
期刊: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 41 |
Issue: | 9 |
起始頁: | 1618 |
結束頁: | 1622 |
顯示於類別: | 期刊論文 |