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顯示 1 到 16 筆資料，總共 16 筆
公開日期標題作者
1-一月-2017An Analytical Placer for Heterogeneous FPGAs via Rough-Placed PackingWu, Wan-Ning; Chen, Chen; Chin, Ching-Yu; Wang, Chun-Kai; Chen, Hung-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2014Clock Tree Synthesis Considering Slew Effect on Supply Voltage VariationWang, Chun-Kai; Chang, Yeh-Chi; Chen, Hung-Ming; Chin, Ching-Yu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Efficient Analog Layout Prototyping by Layout Reuse with Routing PreservationChin, Ching-Yu; Pan, Po-Cheng; Chen, Hung-Ming; Chen, Tung-Chieh; Lin, Jou-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2013Escaped Boundary Pins Routing for High-Speed BoardsChin, Ching-Yu; Kuan, Chung-Yi; Tsai, Tsung-Ying; Chen, Hung-Ming; Kajitani, Yoji; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2015A Fast Prototyping Framework for Analog Layout Migration With Planar PreservationPan, Po-Cheng; Chin, Ching-Yu; Chen, Hung-Ming; Chen, Tung-Chieh; Lee, Chin-Chieh; Lin, Jou-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2014Fast Thermal Aware Placement With Accurate Thermal Analysis Based on Green FunctionLiu, Sean Shih-Ying; Luo, Ren-Guo; Aroonsantidecha, Suradeth; Chin, Ching-Yu; Chen, Hung-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012A Fast Thermal Aware Placement with Accurate Thermal Analysis Based on Green FunctionAroonsantidecha, Suradeth; Liu, Sean Shih-Ying; Chin, Ching-Yu; Chen, Hung-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009Fault Models for Embedded-DRAM MacrosChao, Mango C. -T.; Yang, Hao-Yu; Huang, Rei-Fu; Lin, Shih-Chin; Chin, Ching-Yu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010Mathematical Yield Estimation for Two-Dimensional-Redundancy Memory ArraysChao, Mango C. -T.; Chin, Ching-Yu; Lin, Chen-Wei; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2013Mean-time-to-crack Model of Microbump Interconnect in FCGBA Package under Thermal Cyclic TestChen, Chien-Chang; Wu, Wei-Chen; Chin, Ching-Yu; Chen, Hung-Ming; Lin, Vito; Chen, Eason; 丘成桐中心; 電子工程學系及電子研究所; Shing-Tung Yau Center; Department of Electronics Engineering and Institute of Electronics
1-十二月-2011A Novel Test Flow for One-Time-Programming Applications of NROM TechnologyChao, Mango C. -T.; Chin, Ching-Yu; Tsou, Yao-Te; Chang, Chi-Min; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A Novel Test Flow for One-Time-Programming Applications of NROM TechnologyChin, Ching-Yu; Tsou, Yao-Te; Chang, Chi-Min; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2011On Routing Fixed Escaped Boundary Pins for High Speed BoardsTsai, Tsung-Ying; Lee, Ren-Jie; Chin, Ching-Yu; Kuan, Chung-Yi; Chen, Hung-Ming; Kajitani, Yoji; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2013On Simultaneous Escape Routing of Length Matching Differential SignalingsLee, Yen-Jung; Chen, Hung-Ming; Chin, Ching-Yu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2013Simultaneous Escape Routing on Multiple Components for Dense PCBsChin, Ching-Yu; Chen, Hung-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2017客製化繞線模型與演算法秦敬雨; 陳宏明; Chin, Ching-Yu; Chen, Hung-Ming; 電子研究所
顯示 1 到 16 筆資料，總共 16 筆