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公開日期標題作者
1-二月-2003An all-digital phase-locked loop for high-speed clock generationChung, CC; Lee, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2005An all-digital PLL with cascaded dynamic phase average loop for wide multiplication range applicationsChen, PL; Chung, CC; Lee, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2006A clock generator with cascaded dynamic frequency counting loops for wide multiplication range applicationsChen, PL; Chung, CC; Yang, JN; Lee, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2004A COMM baseband processor with robust synchronization for high-speed WLAN applicationsLiu, HY; Yu, YH; Lin, CC; Chung, CC; Hsu, TY; Lee, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2000Highly selective GaAs/Al0.2Ga0.8As wet etch process for the gate recess of low-voltage-power pseudomorphic high-electron-mobility transistorChang, HC; Chang, EY; Chung, CC; Kuo, CT; 材料科學與工程學系; 友訊交大聯合研發中心; Department of Materials Science and Engineering; D Link NCTU Joint Res Ctr
1-三月-2004A new DLL-based approach for all-digital multiphase clock generationChung, CC; Lee, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2004A novel digitally-controlled varactor for portable delay cell designChen, PL; Chung, CC; Lee, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2005A portable digitally controlled oscillator using novel varactorsChen, PL; Chung, CC; Lee, CY; 電子物理學系; Department of Electrophysics
顯示 1 到 8 筆資料，總共 8 筆