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顯示 1 到 15 筆資料，總共 15 筆
公開日期標題作者
2009The Annihilation of Threading Dislocations in the Germanium Epitaxially Grown within the Silicon Nanoscale TrenchesLuo, Guang-Li; Huang, Shih-Chiang; Ko, Chih-Hsin; Wann, Clement H.; Chung, Cheng-Ting; Han, Zong-You; Cheng, Chao-Ching; Chang, Chun-Yen; Lin, Hau-Yu; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2012Body-Tied Germanium FinFETs Directly on a Silicon SubstrateChen, Che-Wei; Chung, Cheng-Ting; Luo, Guang-Li; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Body-Tied Germanium Tri-Gate Junctionless PMOSFET With In-Situ Boron Doped ChannelChen, Che-Wei; Chung, Cheng-Ting; Tzeng, Ju-Yuan; Chang, Pang-Sheng; Luo, Guang-Li; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A Comprehensive Study of Ge1-xSix on Ge for the Ge nMOSFETs with Tensile Stress, Shallow Junctions and Reduced LeakageLuo, Guang-Li; Huang, Shih-Chiang; Chung, Cheng-Ting; Heh, Dawei; Chien, Chao-Hsin; Cheng, Chao-Ching; Lee, Yao-Jen; Wu, Wen-Fa; Hsu, Chiung-Chih; Kuo, Mei-Ling; Yao, Jay-Yi; Chang, Mao-Nan; Liu, Chee-Wee; Hu, Chenming; Chang, Chun-Yen; Yang, Fu-Liang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Enhancing the Performance of Germanium Channel nMOSFET Using Phosphorus Dopant SegregationChen, Che-Wei; Tzeng, Ju-Yuan; Chung, Cheng-Ting; Chien, Hung-Pin; Chien, Chao-Hsin; Luo, Guang-Li; Wang, Pei-Yu; Tsui, Bing-Yue; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2013Epitaxial Germanium on SOI Substrate and Its Application of Fabricating High I-ON/I-OFF Ratio Ge FinFETsChung, Cheng-Ting; Chen, Che-Wei; Lin, Jyun-Chih; Wu, Che-Chen; Chien, Chao-Hsin; Luo, Guang-Li; Kei, Chi-Chung; Hsiao, Chien-Nan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012First Experimental Ge CMOS FinFETs Directly on SOI SubstrateChung, Cheng-Ting; Chen, Che-Wei; Lin, Jyun-Chih; Wu, Che-Chen; Chien, Chao-Hsin; Luo, Guang-Li; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2017Fully Depleted GeOI-Channel Junctionless pMOSFET with a Low-Resistance-Raised NiGe Alloy S/DLee, Wei-Li; Hsu, Chung-Chun; Chung, Cheng-Ting; Lu, Yu-Hung; Luo, Guang-Li; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014Ge Channel MOSFETs Directly on SiliconChen, Che Wei; Chung, Cheng-Ting; Chien, Chao Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010Ge Epitaxial Growth on GaAs Substrates for Application to Ge-Source/Drain GaAs MOSFETsLuo, Guang-Li; Han, Zong-You; Chien, Chao-Hsin; Ko, Chih-Hsin; Wann, Clement H.; Lin, Hau-Yu; Shen, Yi-Ling; Chung, Cheng-Ting; Huang, Shih-Chiang; Cheng, Chao-Ching; Changb, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2013Germanium N and P Multifin Field-Effect Transistors With High-Performance Germanium (Ge) p(+)/n and n(+)/p Heterojunctions Formed on Si SubstrateChen, Che-Wei; Chung, Cheng-Ting; Tzeng, Ju-Yuan; Li, Pin-Hui; Chang, Pang-Sheng; Chien, Chao-Hsin; Luo, Guang-Li; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2013High On/Off Ratio and Very Low Leakage in p(+)/n and n(+)/p Germanium/Silicon Heterojunction DiodesChen, Che-Wei; Chung, Cheng-Ting; Lin, Jyun-Chih; Luo, Guang-Li; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2014High-Performance Germanium p- and n-MOSFETs With NiGe Source/DrainChen, Che-Wei; Tzeng, Ju-Yuan; Chung, Cheng-Ting; Chien, Hung-Pin; Chien, Chao-Hsin; Luo, Guang-Li; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2012Nearly Dislocation-free Ge/Si Heterostructures by Using Nanoscale Epitaxial Growth MethodLuo, Guang-Li; Ko, Chih-Hsin; Wann, Clement H.; Chung, Cheng-Ting; Han, Zong-You; Cheng, Chao-Ching; Chang, Chun-Yen; Lin, Hau-Yu; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014高介電材料於鍺基板及異質磊晶鍺元件於矽平台之研究鍾政庭; Chung, Cheng-Ting; 簡昭欣; 羅廣禮; Chien, Chao-Hsin; Luo, Guang-Li; 電子工程學系 電子研究所
顯示 1 到 15 筆資料，總共 15 筆