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1-二月-2018Comparison Between High-Holding-Voltage SCR and Stacked Low-Voltage Devices for ESD Protection in High-Voltage ApplicationsDai, Chia-Tsen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
五月-2016ESD Protection Design With Stacked High-Holding-Voltage SCR for High-Voltage Pins in a Battery-Monitoring ICDai, Chia-Tsen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015ESD Protection Design with Stacked Low-Voltage Devices for High-Voltage Pins of Battery-Monitoring ICDai, Chia-Tsen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012Failure Analysis on Gate-Driven ESD Clamp Circuit after TLP Stresses of Different Voltage Steps in a 16-V CMOS ProcessDai, Chia-Tsen; Chiu, Po-Yen; Ker, Ming-Dou; Tsai, Fu-Yi; Peng, Yan-Hua; Tsai, Chia-Ku; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2017Investigation of Unexpected Latchup Path Between HV-LDMOS and LV-CMOS in a 0.25-mu m 60-V/5-V BCD TechnologyDai, Chia-Tsen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Investigation on Safe Operating Area and ESD Robustness in a 60-V BCD Process with Different Deep P-Well Test StructuresDai, Chia-Tsen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
六月-2016Optimization of Guard Ring Structures to Improve Latchup Immunity in an 18 V DDDMOS ProcessDai, Chia-Tsen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Self-Protected LDMOS Output Device with Embedded SCR to Improve ESD Robustness in 0.25-mu m 60-V BCD ProcessHuang, Yu-Ching; Dai, Chia-Tsen; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Study on ESD Protection Design with Stacked Low-Voltage Devices for High-Voltage ApplicationsDai, Chia-Tsen; Ker, Ming-Dou; 電機學院; College of Electrical and Computer Engineering
2012高壓製程之靜電放電防護設計戴嘉岑; Dai, Chia-Tsen; 柯明道; Ker, Ming-Dou; 電子研究所
顯示 1 到 10 筆資料，總共 10 筆