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Issue DateTitleAuthor(s)
1-Jan-2014Analytical Modeling of Proximity and Skin Effects for Millimeter-Wave Inductors Simulation and Design in Nano Si CMOSChan, Ren -Jia; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Feb-2009A Broadband and Scalable Lossy Substrate Model for RF Noise Simulation and Analysis in Nanoscale MOSFETs With Various Pad StructuresGuo, Jyh-Chyurn; Tsai, Yi-Hsiu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Aug-2007A broadband and scalable lumped element model for fully symmetric inductors under single-ended and differentially driven operationsGuo, Jyh-Chyurn; Tan, Teng-Yang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Nov-2007A broadband and scalable on-chip inductor model appropriate for operation modes of varying substrate resistivitiesGuo, Jyh-Chyurn; Tan, Teng-Yang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Sep-2008A compact RF CMOS modeling for accurate high-frequency noise simulation in sub-100-nm MOSFETsGuo, Jyh-Chyurn; Lin, Yi-Min; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
Mar-2017A Comprehensive Characterization Method for Lateral Profiling of Interface Traps and Trapped Charges in P-SONOS Cell DevicesGuo, Jyh-Chyurn; Du, Pei-Ying; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009Flicker Noise in Nanoscale pMOSFETs with Mobility Enhancement Engineering and Dynamic Body BiasesYeh, Kuo-Liang; Ku, Chih-You; Hong, Wei-Lun; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016The Impact of Layout Dependent Effects on Mobility and Flicker Noise in Nanoscale Multifinger nMOSFETs for RF and Analog DesignGuo, Jyh-Chyurn; Lo, Yi-Zen; Ou, Jyun-Rong; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2019The Impact of Layout Dependent Intrinsic Parasitic RLC on High Frequency Performance in 3T and 4T Multi-finger nMOSFETsGuo, Jyh-Chyurn; Ou, Jyun-Rong; Lin, Jinq-Min; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013The Impact of Layout Dependent Stress and Gate Resistance on High Frequency Performance and Noise in Multifinger and Donut MOSFETsKu, Chih-You; Yeh, Kuo-Ling; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Nov-2010The Impact of Layout-Dependent STI Stress and Effective Width on Low-Frequency Noise and High-Frequency Performance in Nanoscale nMOSFETsYeh, Kuo-Liang; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010The Impact of MOSFET Layout Dependent Stress on High Frequency Characteristics and Flicker NoiseYeh, Kuo-Liang; Ku, Chih-You; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Aug-2010The Impact of Uni-axial Strain on Low Frequency Noise in Nanoscale p-Channel Metal-Oxide-Semiconductor Field Effect Transistors under Dynamic Body BiasesYeh, Kuo-Liang; Ku, Chih-You; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2011The Impact of Uniaxial Strain on Flicker Noise and Random Telegraph Noise of SiC Strained nMOSFETs in 40nm CMOS TechnologyYeh, Kuo-Liang; Chang, Chih-Shiang; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010The Impact of Uniaxial Strain on Low Frequency Noise of Nanoscale PMOSFETs with e-SiGe and i-SiGe Source/DrainYeh, Kuo-Liang; Hong, Wei-Lun; Guo, Jyh-Chyurn; 交大名義發表; National Chiao Tung University
1-Sep-2011Layout-Dependent Stress Effect on High-Frequency Characteristics and Flicker Noise in Multifinger and Donut MOSFETsYeh, Kuo-Liang; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009Low Frequency Noise in Nanoscale pMOSFETs with Strain Induced Mobility Enhancement and Dynamic Body BiasesYeh, Kuo-Liang; Ku, Chih-You; Hong, Wei-Lun; Guo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2017Low Power UWB CMOS LNA Using Resistive Feedback and Current-Reused Techniques Under Forward Body BiasGuo, Jyh-Chyurn; Lin, Ching-Shiang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2017Low Voltage and Low power UWB CMOS LNA using Current-Reused and Forward Body Biasing TechniquesGuo, Jyh-Chyurn; Lin, Ching-Shiang; Liang, Yu-Tang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Aug-2006Low-K/Cu CMOS-based SoC technology with 115-GHz f(T), 100-GHz f(max), noise 80-nm RF CMOS, high-Q MiM capacitor, and spiral Cu inductorGuo, Jyh-Chyurn; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
Showing results 1 to 20 of 42  next >