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公開日期標題作者
5-四月-2017Broadband Omnidirectional Light Trapping in Gold-Decorated ZnO Nanopillar ArraysChang, Yuan-Ming; Lin, Man-Ling; Lai, Tung-Yen; Chen, Chang-Hung; Lee, Hsin-Yi; Lin, Chih-Ming; Wu, Yew-Chung Sermon; Lin, Yen-Fu; Juang, Jenh-Yih; 材料科學與工程學系; 電子物理學系; Department of Materials Science and Engineering; Department of Electrophysics
1-十二月-2019Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS2 Channel Directly Grown on SiOx/Si Substrates Using Area-Selective CVD TechnologyChung, Yun-Yan; Lu, Kuan-Cheng; Cheng, Chao-Ching; Li, Ming-Yang; Lin, Chao-Ting; Li, Chi-Feng; Chen, Jyun-Hong; Lai, Tung-Yen; Li, Kai-Shin; Shieh, Jia-Min; Su, Sheng-Kai; Chiang, Hung-Li; Chen, Tzu-Chiang; Li, Lain-Jong; Wong, H-S Philip; Jian, Wen-Bin; Chien, Chao-Hsin; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-十二月-2012Field Emission Properties of Gold Nanoparticle-Decorated ZnO NanopillarsChang, Yuan-Ming; Lin, Man-Ling; Lai, Tung-Yen; Lee, Hsin-Yi; Lin, Chih-Ming; Wu, Yew-Chung Sermon; Juang, Jenh-Yih; 材料科學與工程學系; 電子物理學系; Department of Materials Science and Engineering; Department of Electrophysics
1-一月-2019First demonstration of 40-nm channel length top-gate WS2 pFET using channel area-selective CVD growth directly on SiOx/Si substrateCheng, Chao-Ching; Chung, Yun-Yan; Li, Ming-Yang; Lin, Chao-Ting; Li, Chi-Feng; Chen, Jyun-Hong; Lai, Tung-Yen; Li, Kai-Shin; Shieh, Jia-Min; Su, Sheng-Kai; Chiang, Hung-Li; Chen, Tzu-Chiang; Li, Lain-Jong; Wong, H-S Philip; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2012Threshold Vacuum Switch (TVS) on 3D-Stackable and 4F(2) Cross-Point Bipolar and Unipolar Resistive Random Access MemoryHo, ChiaHua; Huang, Hsin-Hau; Lee, Ming-Taou; Hsu, Cho-Lun; Lai, Tung-Yen; Chiu, Wen-Cheng; Lee, Meiyi; Chou, Tong-Huan; Yang, Ivy; Chen, Min-Cheng; Wu, Cheng-San; Chiang, Kuang-Hao; Yao, Yong-Der; Hu, Chenming; Yang, Fu-Liang; 交大名義發表; National Chiao Tung University
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