1. 目前位置：

瀏覽 的方式： 作者 Lee, Shen-Yang

跳到： 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字：  
顯示 1 到 4 筆資料，總共 4 筆
公開日期標題作者
1-二月-2020Effect of Seed Layer on Gate-All-Around Poly-Si Nanowire Negative-Capacitance FETs With MFMIS and MFIS Structures: Planar Capacitors to 3-D FETsLee, Shen-Yang; Chen, Han-Wei; Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Huang, Yu-En; Chen, Hsin-Yu; Chao, Tien-Sheng; 電子物理學系; 光電工程學系; 光電工程研究所; Department of Electrophysics; Department of Photonics; Institute of EO Enginerring
1-一月-2019Experimental Demonstration of Performance Enhancement of MFMIS and MFIS for 5-nm x 12.5-nm Poly-Si Nanowire Gate-All-Around Negative Capacitance FETs Featuring Seed-Layer and PMA-Free ProcessLee, Shen-Yang; Chen, Han-Wei; Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Huang, Yu-En; Chen, Hsin-Yu; Chao, Tien-Sheng; 電子物理學系; 光電工程學系; 光電工程研究所; Department of Electrophysics; Department of Photonics; Institute of EO Enginerring
1-十一月-2019Experimental Demonstration of Stacked Gate- All-Around Poly-Si Nanowires Negative Capacitance FETs With Internal Gate Featuring Seed Layer and Free of Post-Metal Annealing ProcessLee, Shen-Yang; Chen, Han-Wei; Shen, Chiuan-Huei; Kuo, Po-Yi; Chung, Chun-Chih; Huang, Yu-En; Chen, Hsin-Yu; Chao, Tien-Sheng; 電子物理學系; 光電工程學系; Department of Electrophysics; Department of Photonics
1-一月-2020Nitride Induced Stress Affecting Crystallinity of Sidewall Damascene Gate-All-Around Nanowire Poly-Si FETsShen, Chuan-Hui; Chen, Wei-Yen; Lee, Shen-Yang; Ku, Po-Yi; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
顯示 1 到 4 筆資料，總共 4 筆