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公開日期標題作者
1-一月-2017Fully Depleted GeOI-Channel Junctionless pMOSFET with a Low-Resistance-Raised NiGe Alloy S/DLee, Wei-Li; Hsu, Chung-Chun; Chung, Cheng-Ting; Lu, Yu-Hung; Luo, Guang-Li; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2019Improving Interface State Density and Thermal Stability of High-kappa Gate Stack Through High-Vacuum Annealing on Si0.5Ge0.5Lee, Wei-Li; Yu, Cheng-Yu; Zhang, Jun-Lin; Luo, Guang-Li; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016Integration of Hetero-Structure Body-Tied Ge FinFET Using Retrograde-Well ImplantationChou, Yu-Che; Hsu, Chung-Chun; Chun, Cheng-Ting; Chou, Chen-Han; Tsai, Ming-Li; Tsai, Yi-He; Lee, Wei-Li; Wang, Shin-Yuan; Luo, Guang-Li; Chien, Chao-Hsin; 材料科學與工程學系; 電子工程學系及電子研究所; Department of Materials Science and Engineering; Department of Electronics Engineering and Institute of Electronics
1-二月-2014Spin-Glass Transition and Giant Paramagnetism in Heavily Hole-Doped Bi2Sr2Co2OyHsu, Hung Chang; Lee, Wei-Li; Lin, Jiunn-Yuan; Young, Ben-Li; Kung, Hsiang-Hsi; Huang, Jian; Chou, Fang Cheng; 電子物理學系; 物理研究所; Department of Electrophysics; Institute of Physics
1-一月-2018Study of High-Ge-Content Si0.16Ge0.84 Gate Stack by Low Pressure OxidationLee, Wei-Li; Zhang, Jun-Lin; Tsai, Ming-Li; Wang, Shin-Yuan; Luo, Guang-Li; Chien, Chao-Hsin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 5 筆資料，總共 5 筆