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公開日期標題作者
1-十二月-2010Impact of Highly Compressive Interlayer-Dielectric-SiN(x) Stressing Layer on 1/f Noise and Reliability of SiGe-Channel pMOSFETsChen, Yu-Ting; Chen, Kun-Ming; Liao, Wen-Shiang; Huang, Guo-Wei; Huang, Fon-Shan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2010Impact of Highly Compressive Interlayer-Dielectric-SiNx Stressing Layer on 1/f Noise and Reliability of SiGe-Channel pMOSFETsChen, Yu-Ting; Chen, Kun-Ming; Liao, Wen-Shiang; Huang, Guo-Wei; Huang, Fon-Shan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2012LDMOS Transistor High-Frequency Performance Enhancements by StrainChen, Kun-Ming; Huang, Guo-Wei; Chen, Bo-Yuan; Chiu, Chia-Sung; Hsiao, Chih-Hua; Liao, Wen-Shiang; Chen, Ming-Yi; Yang, Yu-Chi; Wang, Kai-Li; Liu, Chee Wee; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2008RF Noise Modeling of SiGe HBTs Using Four-Port De-embedding MethodChen, Kun-Ming; Chen, Han-Yu; Huang, Guo-Wei; Liao, Wen-Shiang; Chang, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2007A thick CESL stressed ultra-small (Lg=40nm) SiGe-channel MOSFET fabricated with 193nm scanner lithography and TEOS hard mask etchingLiao, Wen-Shiang; Chen, Tung-Hung; Lin, Hsin-Hung; Chang, Wen-Tung; 材料科學與工程學系; Department of Materials Science and Engineering
1-一月-2007A thin FinFET Si-fin body structure fabricated with 193nm scanner photolithography and composite hard mask etching technique upon bulk-Si substrateLiao, Wen-Shiang; Liu, Yu-Huan; Chang, Wen-Tung; Chen, Tung-Hung; Shih, Tommy; Tsen, Huan-Chiu; Chung, Lee; 材料科學與工程學系; Department of Materials Science and Engineering
顯示 1 到 6 筆資料，總共 6 筆