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顯示 1 到 12 筆資料，總共 12 筆
公開日期標題作者
1-一月-2018Analog Placement with Current Flow and Symmetry Constraints using PCP-SPPatyal, Abhishek; Pan, Po-Cheng; Asha, K. A.; Chen, Hung-Ming; Chi, Hao-Yu; Liu, Chien-Nan; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
1-一月-2014An Automatic Synthesis Tool for Nanometer Low Dropout Regulator Using Simulation Based Model and Geometric ProgrammingHsu, Shih-Hsin; Chen, Wei-Zen; Zheng, Jui-Pin; Liu, Sean S. -Y.; Pan, Po-Cheng; Chen, Hung-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012Configurable Analog Routing Methodology via Technology and Design Constraint UnificationPan, Po-Cheng; Chen, Hung-Ming; Cheng, Yi-Kan; Liu, Jill; Hu, Wei-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Efficient Analog Layout Prototyping by Layout Reuse with Routing PreservationChin, Ching-Yu; Pan, Po-Cheng; Chen, Hung-Ming; Chen, Tung-Chieh; Lin, Jou-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2011Fast Analog Layout Prototyping for Nanometer Design MigrationWeng, Yi-Peng; Chen, Hung-Ming; Chen, Tung-Chieh; Pan, Po-Cheng; Chen, Chien-Hung; Chen, Wei-Zen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2015A Fast Prototyping Framework for Analog Layout Migration With Planar PreservationPan, Po-Cheng; Chin, Ching-Yu; Chen, Hung-Ming; Chen, Tung-Chieh; Lee, Chin-Chieh; Lin, Jou-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Late Breaking Results: An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit SynthesisPan, Po-Cheng; Huang, Chien-Chia; Chen, Hung-Ming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2018On Closing the Gap Between Pre-simulation and Post-simulation Results in Nanometer Analog LayoutsPan, Po-Cheng; Huang, Hung-Wen; Huang, Chien-Chia; Patyal, Abhishek; Chen, Hung-Ming; Yang, Tsun-Yu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2013PAGE: Parallel Agile Genetic Exploration towards Utmost Performance for Analog Circuit DesignPan, Po-Cheng; Chen, Hung-Ming; Lin, Chien-Chih; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2009A Stochastic-Based Efficient Critical Area Extractor on Open Access PlatformChen, Bo-Zhou; Chen, Hung-Ming; Huang, Li-Da; Pan, Po-Cheng; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2009A Stochastic-Based Efficient Critical Area Extractor on Open Access PlatformChen, Bo-Zhou; Chen, Hung-Ming; Huang, Li-Da; Pan, Po-Cheng; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015敏捷類比電路合成與佈局設計遷移方法潘柏丞; Pan, Po-Cheng; 陳宏明; Chen, Hung-Ming; 電子工程學系 電子研究所
顯示 1 到 12 筆資料，總共 12 筆