1. 目前位置：

瀏覽 的方式： 作者 Sung, Po-Jung

跳到： 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字：  
顯示 1 到 13 筆資料，總共 13 筆
公開日期標題作者
五月-201632-nm Multigate Si-nTFET With Microwave-Annealed Abrupt JunctionHou, Fu-Ju; Sung, Po-Jung; Hsueh, Fu-Kuo; Wu, Chien-Ting; Lee, Yao-Jen; Chang, Mao-Nang; Li, Yiming; Hou, Tuo-Hung; 電機學院; 電子工程學系及電子研究所; College of Electrical and Computer Engineering; Department of Electronics Engineering and Institute of Electronics
2014Characterization of Ultra-Thin Ni Silicide Film by Two-Step Low Temperature Microwave AnnealWu, Chien-Ting; Lee, Yao-Jen; Hsueh, Fu-Kuo; Sung, Po-Jung; Cho, Ta-Chun; Current, Michael Ira; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
2015Diamond-shaped Ge and Ge0.9Si0.1 Gate-All-Around Nanowire FETs with Four {111} Facets by Dry Etch TechnologyLee, Yao-Jen; Hou, Fu-Ju; Chuang, Shang-Shiun; Hsueh, Fu-Kuo; Kao, Kuo-Hsing; Sung, Po-Jung; Yuan, Wei-You; Yao, Jay-Yi; Lu, Yu-Chi; Lin, Kun-Lin; Wu, Chien-Ting; Chen, Hisu-Chih; Chen, Bo-Yuan; Huang, Guo-Wei; Chen, Henry J. H.; Li, Jiun-Yun; Li, Yiming; Samukawa, Seiji; Chao, Tien-Sheng; Tseng, Tseung-Yuen; Wu, Wen-Fa; Hou, Tuo-Hung; Yeh, Wen-Kuan; 電子物理學系; 電機學院; 電子工程學系及電子研究所; Department of Electrophysics; College of Electrical and Computer Engineering; Department of Electronics Engineering and Institute of Electronics
1-一月-2020Effects of Forming Gas Annealing and Channel Dimensions on the Electrical Characteristics of FeFETs and CMOS InverterSung, Po-Jung; Su, Chun-Jung; Lo, Shih-Hsuan; Hsueh, Fu-Kuo; Lu, Darsen D.; Lee, Yao-Jen; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-九月-2020Fabrication of Vertically Stacked Nanosheet Junctionless Field-Effect Transistors and Applications for the CMOS and CFET InvertersSung, Po-Jung; Chang, Shu-Wei; Kao, Kuo-Hsing; Wu, Chien-Ting; Su, Chun-Jung; Cho, Ta-Chun; Hsueh, Fu-Kuo; Lee, Wen-Hsi; Lee, Yao-Jen; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
2015High Performance Poly Si Junctionless Transistors with Sub-5nm Conformally Doped Layers by Molecular Monolayer Doping and Microwave Incorporating CO2 Laser Annealing for 3D Stacked ICs ApplicationsLee, Yao-Jen; Cho, Ta-Chun; Sung, Po-Jung; Kao, Kuo-Hsing; Hsueh, Fu-Kuo; Hou, Fu-Ju; Chen, Po-Cheng; Chen, Hsiu-Chih; Wu, Chien-Ting; Hsu, Shu-Han; Chen, Yi-Ju; Huang, Yao-Ming; Hou, Yun-Fang; Huang, Wen-Hsien; Yang, Chih-Chao; Chen, Bo-Yuan; Lin, Kun-Lin; Chen, Min-Cheng; Shen, Chang-Hong; Huang, Guo-Wei; Huang, Kun-Ping; Current, Michael I.; Li, Yiming; Samukawa, Seiji; Wu, Wen-Fa; Shieh, Jia-Min; Chao, Tien-Sheng; Yeh, Wen-Kuan; 電子物理學系; 電機學院; Department of Electrophysics; College of Electrical and Computer Engineering
1-五月-2017High-Performance Uniaxial Tensile Strained n-Channel JL SOI FETs and Triangular JL Bulk FinFETs for Nanoscaled ApplicationsSung, Po-Jung; Cho, Ta-Chun; Hou, Fu-Ju; Hsueh, Fu-Kuo; Chung, Sheng-Ti; Lee, Yao-Jen; Current, Michael I.; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-十月-2013Low-Temperature Microwave Annealing for MOSFETs With High-k/Metal Gate StacksLee, Yao-Jen; Tsai, Bo-An; Lai, Chiung-Hui; Chen, Zheng-Yao; Hsueh, Fu-Kuo; Sung, Po-Jung; Current, Michael I.; Luo, Chih-Wei; 電子物理學系; Department of Electrophysics
2014Low-temperature Microwave Annealing Processes for Future IC FabricationLee, Yao-Len; Tsai, Bo-An; Cho, Ta-Chun; Hsueh, Fu-Kuo; Sung, Po-Jung; Lai, Chiung-Hui; Luo, Chih-Wei; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-三月-2014Low-Temperature Microwave Annealing Processes for Future IC Fabrication-A ReviewLee, Yao-Jen; Cho, Ta-Chun; Chuang, Shang-Shiun; Hsueh, Fu-Kuo; Lu, Yu-Lun; Sung, Po-Jung; Chen, Hsiu-Chih; Current, Michael I.; Tseng, Tseung-Yuen; Chao, Tien-Sheng; Hu, Chenming; Yang, Fu-Liang; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
十月-2016Suspended Diamond-Shaped Nanowire With Four {111} Facets for High-Performance Ge Gate-All-Around FETsHou, Fu-Ju; Sung, Po-Jung; Hsueh, Fu-Kuo; Wu, Chien-Ting; Lee, Yao-Jen; Li, Yiming; Samukawa, Seiji; Hou, Tuo-Hung; 電機學院; 電子工程學系及電子研究所; College of Electrical and Computer Engineering; Department of Electronics Engineering and Institute of Electronics
1-一月-2017Ultra-Shallow Junction Formation by Monolayer Doping Process in Single Crystalline Si and Ge for Future CMOS DevicesChuang, Shang-Shiun; Cho, Ta-Chun; Sung, Po-Jung; Kao, Kuo-Hsing; Chen, Henry J. H.; Lee, Yao-Jen; Current, Michael I.; Tseng, Tseung-Yuen; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-十月-2020Well-behaved Ge n(+)/p shallow junction achieved by plasma immersion ion implantationChen, Yi-Ju; Liao, Hsiu-Hsien; Tsui, Bing-Yue; Lee, Yao-Jen; Wang, Chih-Jen; Sung, Po-Jung; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 13 筆資料，總共 13 筆