瀏覽 的方式: 作者 Wu, Jia-Jiun

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公開日期標題作者
1-二月-2013Characteristic of p-Type Junctionless Gate-All-Around Nanowire Transistor and Sensitivity AnalysisHan, Ming-Hung; Chang, Chun-Yen; Jhan, Yi-Ruei; Wu, Jia-Jiun; Chen, Hung-Bin; Cheng, Ya-Chi; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2013Characteristics of Gate-All-Around Junctionless Poly-Si TFTs With an Ultrathin ChannelChen, Hung-Bin; Chang, Chun-Yen; Lu, Nan-Heng; Wu, Jia-Jiun; Han, Ming-Hung; Cheng, Ya-Chi; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Low-Voltage Programmable Gate-All-Around (GAA) Nanosheet TFT Nonvolatile Memory Using Band-to-Band Tunneling Induced Hot Electron (BBHE) MethodChen, Lun-Chun; Chen, Hung-Bin; Chang, Yu-Shuo; Lin, Shih-Han; Han, Ming-Hung; Wu, Jia-Jiun; Yeh, Mu-Shin; Lin, Yu-Ru; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2012A Novel Cost Effective Double Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor Design for Improving Off-State Breakdown VoltageHan, Ming-Hung; Chen, Hung-Bin; Chang, Chia-Jung; Wu, Jia-Jiun; Chen, Wen-Chong; Tsai, Chi-Chong; Chang, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2013Performance Comparison Between Bulk and SOI Junctionless TransistorsHan, Ming-Hung; Chang, Chun-Yen; Chen, Hung-Bin; Wu, Jia-Jiun; Cheng, Ya-Chi; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012使用氧化薄化奈米尺度片狀通道之具PI型閘極無接面薄膜電晶體之製作與特性吳佳駿; Wu, Jia-Jiun; 張俊彥; 鄭晃忠; Chang, Chun-Yen; Cheng, Huang-Chung; 電子研究所