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公開日期標題作者
2014A Circuit Level Variability Prediction of Basic Logic Gates in Advanced Trigate CMOS TechnologyHsieh, E. R.; Hung, C. M.; Wang, T. Y.; Chung, Steve S.; Huang, R. M.; Tsai, C. T.; Yew, T. R.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015The Demonstration of Low-cost and Logic Process Fully-Compatible OTP Memory on Advanced HKMG CMOS with a Newly found Dielectric Fuse BreakdownHsieh, E. R.; Huang, Z. H.; Chung, Steve S.; Ke, J. C.; Yang, C. W.; Tsai, C. T.; Yew, T. R.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2017Geometric Variation: A Novel Approach to Examine the Surface Roughness and the Line Roughness Effects in Trigate FinFETsHsieh, E. R.; Fan, Y. C.; Liu, C. H.; Chung, Steve S.; Huang, R. M.; Tsai, C. T.; Yew, T. R.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十月-2013The improvement of catalytic efficiency by optimizing Pt on carbon cloth as a cathode of a microbial fuel cellYen, S. J.; Tsai, M. C.; Wang, Z. C.; Peng, H. L.; Tsai, C. H.; Yew, T. R.; 生物科技學系; Department of Biological Science and Technology
2015The RTN Measurement Technique on Leakage Path Finding in Advanced High-k Metal Gate CMOS DevicesHsieh, E. R.; Lu, P. Y.; Chung, Steve S.; Ke, J. C.; Yang, C. W.; Tsai, C. T.; Yew, T. R.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
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