標題: | The Demonstration of Low-cost and Logic Process Fully-Compatible OTP Memory on Advanced HKMG CMOS with a Newly found Dielectric Fuse Breakdown |
作者: | Hsieh, E. R. Huang, Z. H. Chung, Steve S. Ke, J. C. Yang, C. W. Tsai, C. T. Yew, T. R. 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2015 |
摘要: | For the first time, the dielectric fuse breakdown has been observed in HKMG and poly-Si CMOS devices. It was found that, different from the conventional anti-fuse dielectric breakdown, such as the hard and soft breakdowns, this new fuse-breakdown behavior exhibits a typical property of an open gate and can be operated in much lower programming current (<50 mu A), fast speed (similar to 20 mu sec), and excellent data retention, in comparison to the other fuse mechanisms. Based on this new mechanism, we have designed a smallest memory cell array which can be easily integrated into state-of-the-art advanced CMOS technology to realize highly reliable, secure, and dense OTP functionality with very low cost to meet the requirements of memory applications in the IoT era. |
URI: | http://hdl.handle.net/11536/136035 |
ISBN: | 978-1-4673-9894-7 |
期刊: | 2015 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) |
顯示於類別: | 會議論文 |