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Control of metamorphic buffer structure and device performance of InxGa1-xAs epitaxial layers fabricated by metal organic chemical vapor deposition
(2014-12-05)
Nguyen, H. Q.
;
Yu, H. W.
;
Luc, Q. H.
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Tang, Y. Z.
;
Phan, V. T. H.
Using a step-graded (SG) buffer structure via metal-organic chemical vapor deposition, we demonstrate a high suitability of In0.5Ga0.5As epitaxial layers on a GaAs substrate for electronic device application. Taking advantage of the technique\'s precise control, we were able to increase the number of SG layers to achieve a fairly low dislocation density (similar to 10(6)cm(-2)), while keeping each individual SG layer slightly exceeding the critical thickness (similar to 80 nm) for strain relaxation. This met the demanded but contradictory requirements, and even offered excellent scalability by lowering the whole buffer structure down to 2.3 mu m. This scalability overwhelmingly excels the forefront studies. The effects of the SG misfit strain on the crystal quality and surface morphology of In0.5Ga0.5As epitaxial layers were carefully investigated, and were correlated to threading dislocation (TD) blocking mechanisms. From microstructural analyses, TDs can be blocked effectively through self-annihilation reactions, or hindered randomly by misfit dislocation mechanisms. Growth conditions for avoiding phase separation were also explored and identified. The buffer-improved, high-quality In0.5Ga0.5As epitaxial layers enabled a high-performance, metal-oxide-semiconductor capacitor on a GaAs substrate. The devices displayed remarkable capacitance-voltage responses with small frequency dispersion. A promising interface trap density of 3 x 10(12) eV(-1) cm(-2) in a conductance test was also obtained. These electrical performances are competitive to those using lattice-coherent but pricey InGaAs/InP systems.
Normally-off operation AlGaN/GaN MOS-HEMT with high threshold voltage
(2010-09-02)
Chang, C. -T.
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Hsu, T. -H.
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Chang, E. Y.
;
Chen, Y. -C.
;
Trinh, H. -D.
Normally-off operation AlGaN/GaN high electron mobility transistors have been developed utilising a fluorine-based treatment technique combined with a metal-oxide-semiconductor gate architecture. Threshold voltage as high as 5.1 V was achieved by using an 16 nm-thick Al(2)O(3) gate oxide film. Additionally, the device performed a drain current density of 500 mA/mm and a peak transconductance of 100 mS/mm, which are comparable to the conventional normally-on devices.
Nonpolar a-plane GaN grown on r-plane sapphire using multilayer AlN buffer by metalorganic chemical vapor deposition
(2011-01-15)
Chiang, C. H.
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Chen, K. M.
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Wu, Y. H.
;
Yeh, Y. S.
;
Lee, W. I.
Mirror-like and pit-free non-polar a-plane (11-20) GaN films are grown on r-plane (1-102) sapphire substrates using metalorganic chemical vapor deposition (MOCVD) with multilayer high-low-high temperature AlN buffer layers. The buffer layer structure and film quality are essential to the growth of a flat, crack-free and pit-free a-plane GaN film. The multilayer AlN buffer structure includes a thin low-temperature- deposited AlN (LT-AlN) layer inserted into the high-temperature-deposited AlN (HT-AlN) layer. The results demonstrate that the multilayer AlN buffer structure can improve the surface morphology of the upper a-plane GaN film. The grown multilayer AlN buffer structure reduced the tensile stress on the AlN buffer layers and increased the compressive stress on the a-plane GaN film. The multilayer AlN buffer structure markedly improves the surface morphology of the a-plane GaN film, as revealed by scanning electron microscopy. The effects of various growth V/III ratios was investigated to obtain a-plane GaN films with better surface morphology. The mean roughness of the surface was 1.02 nm, as revealed by atomic force microscopy. Accordingly, the multilayer AlN buffer structure improves the surface morphology and facilitates the complete coalescence of the a-plane GaN layer. (C) 2010 Elsevier B.V. All rights reserved.
Low Leakage Current GaN MIS-HEMT with SiNx Gate Insulator using N-2 Plasma Treatment
(2013)
Liu, S. C.
;
Wang, H. C.
;
Chang, E. Y.
;
材料科學與工程學系
;
Department of Materials Science and Engineering
In this work, an effective N-2 plasma treatment for suppressing leakage current in GaN MIS-HEMT has been demonstrated. We observed an important issue of leakage current from the SiNx/GaN interface. To investigate the leakage current mechanisms, we measured the leakage current from all the possible paths in the device structure, such as gate, mesa isolation, and drain leakage. The current-voltage measurement results reveal a severe leakage path at the SiNx/GaN interface after SiNx deposited on the GaN surface without N-2 plasma treatment. By using N-2 plasma treatment, we succeed in suppressing the leakage current and effectively improve breakdown voltage. A significant performance improvement of GaN MIS-HEMT with very low leakage current has been achieved through the N-2 plasma treatment.
Low Current Collapse and Low Leakage GaN MIS-HEMT Using AlN/SiN as Gate Dielectric and Passivation Layer
(2014)
Liu, S. C.
;
Wong, Y. Y.
;
Lin, Y. C.
;
Chang, E. Y.
;
材料科學與工程學系
An effective passivation and gate insulator with low current collapse and improved dynamic ON-state resistance (R-ON) for GaN MIS-HEMT is demonstrated in this work. The structure of passivation and gate insulator is fabricated by 4-nm SiN as the first passivation layer and 1-nm AlN. The bilayer AlN/SiN structure integrates the advantages of SiN and AlN. SiN passivation has been proved to effectively reduce GaN surface states. AlN has high bandgap of similar to 6.2 eV which can suppress leakage current. Hence, the unfavorable effects such as trapping effect and leakage current which will induce current collapse and are effectively suppressed by using AlN/SiN bilayer thin film. A GaN MIS-HEMT with AlN/SiN passivation and gate dielectric exhibits improved I. V characteristics, low leakage current, low current collapse, and improved dynamic RON at high quiescent drain bias of 100 V.
Ti/Al/Ni/Cu Ohmic Contact with Low Contact Resistance and Smooth Surface Morphology for AlGaN/GaN HEMT
(2014)
Wong, Y. -Y.
;
Chang, E. Y.
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Chen, Y. -K.
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Liu, S. -C.
;
Lin, Y. -C.
The feasibility of replacing the Au layer in a conventional ohmic contact of Ti/Al/Ni/Au for AlGaN/GaN structure with Cu has been investigated. While the thicknesses of Ti, Al and Cu layers were fixed throughout the study, the thickness of Ni layer was varied to examine its influence on the Cu-based ohmic contacts. It is showed that the Ni layer thickness played an important role in the Ti/Al/Ni/Cu metallization for achieving low contact resistance and smooth surface morphology. With a 50-angstrom Ni layer, a low specific contact resistance (r(c)) of 1.35x10(-6) ohm-cm(2) has been realized. This result is comparable with the conventional ohmic contact (r(c) = 1.19x10(-6) ohm-cm(2)). High electron mobility transistor (HEMT) devices fabricated using both Au- and Cu-based ohmic contact exhibited similar DC characteristics, suggesting that the electrical performance did not degrade with the used of Cu in the ohmic contact. Furthermore, in the absence of Au, the surface roughening caused by Au-Al alloy in the conventional ohmic contact was also prevented. As a result, the root-mean-square roughness of the optimized Cu-based contact was only 7.62 nm as compared to 134 nm for the conventional structure.
In0.5Ga0.5As-Based Metal-Oxide-Semiconductor Capacitor on GaAs Substrate Using Metal-Organic Chemical Vapor Deposition
(2013-01-01)
Nguyen, H. Q.
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Trinh, H. D.
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Chang, E. Y.
;
Lee, C. T.
;
Wang, Shin Yuan
We demonstrate the good-performance In0.5Ga0.5As-based metal-oxide-semiconductor capacitor (MOSCAP) on GaAs substrate using metal-organic chemical vapor deposition technique. In0.5Ga0.5As film grown on GaAs substrate is proved to be high quality with threading dislocation density as low as 10(6) cm(-2). The performance of the MOSCAPs is comparable to that of In0.53Ga0.47As/InP-based devices grown by molecular beam epitaxy technique. The devices show a nice capacitance-voltage response, with small frequency dispersion. The parallel conductance contours show the free movement of Fermi level with the gate bias. Acceptable interface trap density D-it values of 5 x 10(11)-2 x 10(12) eV(-1) . cm(-2) in the energy range of 0.64-0.52 eV above the InGaAs valence band maximum in In0.5Ga0.5As/GaAs MOSCAPs obtained by conductance methods were shown.
Enhanced lateral heat dissipation packaging structure for GaN HEMTs on Si substrate
(2013-03-01)
Cheng, Stone
;
Chou, Po-Chien
;
Chieng, Wei-Hua
;
Chang, E. Y.
;
機械工程學系
This work presents a technology for packaging AlGaN/GaN high electron mobility transistors (HEMTs) on a Si substrate. The GaN HEMTs are attached to a V-groove copper base and mounted on a TO-3P leadframe. The various thermal paths from the GaN gate junction to the case are carried out for heat dissipation by spreading to protective coating; transferring through the bond wires; spreading in the lateral device structure through the adhesive layer, and vertical heat spreading of silicon chip bottom. Thermal characterization showed a thermal resistance of 13.72 degrees C/W from the device to the TO-3P package. Experimental tests of a 30 mm gate-periphery single chip packaged in a 5 x 3 mm V-groove Cu base with a 100 V drain bias showed power dissipation of 22 W. (c) 2012 Elsevier Ltd. All rights reserved.
Effect of graded-temperature arsenic prelayer on quality of GaAs on Ge/Si substrates by metalorganic vapor phase epitaxy
(2011-10-24)
Yu, H. W.
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Chang, E. Y.
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Yamamoto, Y.
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Tillack, B.
;
Wang, W. C.
The growth of GaAs epitaxy on Ge/Si substrates with an arsenic prelayer grown with graded temperature ramped from 300 to 420 degrees C is investigated. It is demonstrated that the graded-temperature arsenic prelayer grown on a Ge/Si substrate annealed at 650 degrees C not only improves the surface morphology (roughness: 1.1 nm) but also reduces the anti-phase domains' (APDs) density in GaAs epitaxy (dislocation density: similar to 2 x 10(7) cm(-2)). Moreover, the unwanted interdiffusion between Ge and GaAs epitaxy is suppressed by using the graded-temperature arsenic prelayer due to the low energy of the Ge-As bond and the use of a low V/III ratio of 20. (C) 2011 American Institute of Physics. [doi:10.1063/1.3656737]
Photoluminescence and Raman studies of GaN films grown by MOCVD
(2009)
Luong Tien Tung
;
Lin, K. L.
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Chang, E. Y.
;
Huang, W. C.
;
Hsiao, Y. L.
The photoluminescence (PL) of high quality GaN epitaxial layer grown by MOCVD was investigated for various excitation power and temperatures from 8.3 to 300K. The PL at 8.3 K and with relatively low excitation power of GaN film grown on c-plane sapphire by using MOCVD shows clearly free-exciton A, B and exciton A bound to neutral donors (D degrees X) at 3.502 eV, 3.509 eV, and 3.496 eV, respectively. The full width at half maximum (FWHM) and binding energy of exciton A of the high quality GaN film were evaluated as small as 3.7 meV and 27.9 +/- 0.5 meV, respectively. In addition, PL and Raman scattering of GaN films grown on r-plane sapphire and (111) Si substrates by using MOCVD were examined. The residual stress effect was detected in all films.

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