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Electroless plating with Pd induced crystallization of amorphous silicon thin films
(2002-11-01)
Hu, GR
;
Wu, YCS
;
Chao, CW
;
Huang, TJ
;
材料科學與工程學系
A metal-induced crystallization method can be used to decrease the crystallization temperature of amorphous silicon (a-Si). In this study, Pd metal was deposited by an electroless plating method. After it was annealed at 550degreesC, two kinds of needlelike grains were found. The direction of the primary grain was along <211> and the growth of the secondary grain occurred along the <011> direction.
Effects of oxygen on the growth of Ni induced lateral crystallization of amorphous silicon films
(2003-06-26)
Lin, YD
;
Wu, YS
;
Chao, CW
;
Hu, GR
;
材料科學與工程學系
Effects of oxygen on the growth of metal (Ni) induced lateral crystallization (MILC) of amorphous silicon have been investigated. It is found that the oxygen in the annealing ambient did not degrade the MILC length or growth rate. The oxygen existence in Ni film does not degrade the MILC growth rate either. However, it retards the nucleation of poly-Si for about 4 h. This is because that NiO needed an incubation period to be reduced to nickel metal for the subsequent mediated crystallization of a-Si process. (C) 2003 Elsevier Science B.V. All rights reserved.
Improved annealing process for electroless Pd plating induced crystallization of amorphous silicon
(2003-08-01)
Hu, GR
;
Huang, TJ
;
Wu, YS
;
材料科學與工程學系
;
Department of Materials Science and Engineering
Electroless Pd plating induced crystallization of amorphous silicon (a-Si) thin films has been proposed for fabricating low-temperature polycrystalline silicon thin film transistors (LTPS TFTs). However, the current crystallization process often leads to poor device performance due to the large amount of I'd-silicide residues in the poly-Si thin films. It was found that the amount of I'd silicide increased with annealing time and temperature. In this study, a two-step annealing process was developed to obtain the appropriate amount of Pd silicide for inducing the crystallization of a-Si. The device characteristics were significantly improved by this two-step process.
Wafer bonding by Ni-induced crystallization of amorphous silicon
(2003-09-01)
Chao, CP
;
Wu, YCS
;
Lee, TL
;
Wang, YH
;
材料科學與工程學系
Wafer bonding by Ni-induced crystallization of amorphous silicon was investigated. It was found that wafers can be bonded through the crystallization of amorphous silicon at temperatures below 550 degreesC. Moreover, when 250 V was applied across the stacked samples, the bonding temperatures could be decreased to as low as 350 degreesC.
Effects of tensile stress on growth of Ni-metal-induced lateral crystallization of amorphous silicon
(2005-10-01)
Hou, CY
;
Wu, YCS
;
材料科學與工程學系
;
Department of Materials Science and Engineering
The Ni-metal-induced lateral crystallization (NILC) of amorphous silicon (a-Si) has been used to fabricate low-temperature polycrystalline silicon thin-film transistors. Three stages have been identified in the NILC process: (1) the formation of NiSi(2), precipitates, (2) the nucleation of crystalline Si (c-Si) on NiSi(2) precipitates, and (3) the subsequent migration of NiSi(2) precipitates and growth of c-Si. In this study, a bending fixture was used to investigate the effects of tensile stress oil the growth of NILC. It was found that tensile stress did not enhance NiSi(2) formation and c-Si nucleation stages, but enhanced the c-Si growth stage. It was also found that compressive stress did not change NILC rate.
Effects of oxygen in Ni films on Ni-induced lateral crystallization of amorphous silicon films at various temperatures
(2006-09-01)
Lin, You-Da
;
Wu, Yewchung Sermon
;
材料科學與工程學系
;
Department of Materials Science and Engineering
Effects of oxygen in Ni films on. the Ni-induced lateral crystallization (NILC) of amorphous silicon (a-Si) films at various temperatures have been investigated. It was found that oxygen in Ni films retarded the nucleation of polycrystalline silicon (poly-Si) from a-Si, but had little effect on the growth rate of poly-Si. This is because that needed an incubation period to be reduced to Ni metal for the subsequent mediated crystallization of a-Si.
Electrical Properties of Metal-Silicon Nitride-Hydrogenated Amorphous Silicon Capacitor Elucidated Using Admittance Spectroscopy
(2008-12-01)
Hsieh, Ming-Ta
;
Chen, Jenn-Fang
;
Yen, Kuo-Hsi
;
Zan, Hsiao-Wen
;
Chang, Chan-Ching
Detailed admittance spectroscopy was performed on a metal-silicon nitride-hydrogenated amorphous silicon (MIAS) structure. On the basis of the properties of hydrogenated amorphous silicon (a-Si:H), three simplified equivalent circuit models under various operating conditions (accumulation, depletion and full depletion) are presented along with an alternative direct measurement method at room temperature. Admittance spectroscopy shows that the interface states density between silicon nitride (SiN(x)) and a-Si:H can be determined from the depletion equivalent circuit model. The resisivity and activation energy of a-Si:H can also be obtained using the accumulation and depletion equivalent circuit models. These models can be employed easily to monitor the fabrication parameters of thin-films transistors (TFTs) and to accurately and directly obtain the capacitance model parameters of TFTs. [DOI: 10.1143/JJAP.47.8714]
Characterization of anodic aluminum oxide film and its application to amorphous silicon thin film transistors
(1996-02-01)
Liang, CW
;
Luo, TC
;
Feng, MS
;
Cheng, HC
;
Su, D
AL(2)O(3)/SINx double-layered dielectric films suitable for large-size amorphous silicon thin film transistor liquid crystal displays (a-Si:H TFT LCD) have been prepared by anodization and plasma enhanced chemical vapor deposition (PECVD). Al2O3 films were formed at various pH values and volume ratio of water (H2O%) in the electrolyte. The optimal quality of Al2O3 film was achieved at pH = 6 and H2O% = 30. These high-quality Al2O3 films have denser structure, lower etching rate (90 Angstrom min(-1)) and smooth surface morphology after etching. The capacitors made of the anodization show a breakdown field as high as 7.8 MV cm(-1) and a low leakage current density of 10 nA cm(-2) at a dielectric field of 3 MV cm(-1). Furthermore, a-Si:H TFTs with Al gate and different gate dielectrics (Al2O3/SINx and SiNx) were also fabricated and evaluated. The TFTs with Al2O3/SiNx double-layered gate dielectric provide better performances, such as the smaller threshold voltage (1.76 V), improved subthreshold swing (1.0 V dec(-1)), and lower off-current (3.8 PA) than those of the device with single SiNx, film.
Excellent emission characteristics of tunneling oxides formed using ultrathin silicon films for flash memory devices
(1996-06-01)
Wang, PW
;
Ku, TK
;
Su, HP
;
Hong, G
;
Cheng, HC
A novel technique using oxidized ultrathin rugged polysilicon films on silicon substrates has been appied to significantly improve the tunneling efficiency of thin oxides. As compared with oxidized amorphous silicon films, these rugged polysilicon films can achieve a higher emission current. High-resolution transmission electron microscopy (HRTEM) was used to observe the atomic-scale microtips at the SiO2/Si and polysilicon/SiO2 interfaces. According to the extracted geometry parameters of the microtips, a two-dimensional numerical simulator based on the finite difference method using the curved emitting surface of microtips can well explain the remarkable current asymmetry of the dielectrics. This suggests that the oxidized rugged polysilicon films can form higher microtips and smaller tip angles, resulting in better emission characteristics that will enable potential applications to future 5-V-only nonvolatile memories.
A novel thin-film transistor with vertical offset structure
(1997-04-01)
Lin, CW
;
Chang, CY
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A novel device structure consisting of conventional hydrogenated amorphous silicon (a-Si:H) for the source and drain and of hydrogenated microcrystalline soilicon (mu c-Si:H) for the channel region which can improve the performance of thin-film transistors (TFTs) has been proposed and fabricated. Undoped a-Si:H serves as a blocking layer to suppress the OFF-state current in the drain region which is comparable to that of conventional a-Si:H TFT with a much higher drivability. The fabrication process is simple and inexpensive e with the possibility of high reliability.

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