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First Experimental Demonstration of Negative Capacitance InGaAs MOSFETs With Hf0.5Zr0.5O2 Ferroelectric Gate Stack
(2018-01-01)
Luc, Q. H.
;
Fan-Chiang, C. C.
;
Huynh, S. H.
;
Huang, P.
;
Do, H. B.
We demonstrate, for the first time, the negative capacitance (NC) In0.53Ga0.47As nMOSFET with 8-nm Hf0.5Zr0.5O2 (HZO) as ferroelectric (FE) dielectric for sub-60 mV/dec subthreshold swing (SS). The impact of annealing treatments on the FE properties and electrical characteristics of NC InGaAs nMOSFETs are investigated. Optimized annealing condition results in NC effects at the HZO/Al2O3/InGaAs nMOSFETs with steep SS property (similar to 11 mV/dec).
Experimental and modeling on atomic layer deposition Al2O3/n-InAs metal-oxide-semiconductor capacitors with various surface treatments
(2011-01-01)
Trinh, H. D.
;
Chang, E. Y.
;
Brammertz, G.
;
Lu, C. Y.
;
Nguyen, H. Q.
Ex-situ sulfide and HCl wet chemical treatments in conjunction with in-situ trimethyl aluminum (TMA) pretreatment were performed before the deposition of Al2O3 on n-InAs surfaces. X-ray photoelectron spectroscopy analyses show a significant reduction of InAs native oxides after different treatments. Capacitance-voltage (C-V) characterization of Al2O3/n-InAs structures shows that the frequency dispersion in accumulation regime is small (<0.75% per decade) and does not seem to be affected significantly by the different surface treatments, whereas the latter improves depletion and inversion behaviors of the nMOS capacitors. The interface trap density profiles extracted from simulation show mainly donor-like interface states inside the InAs bandgap and in the lower part of the conduction band. The donor-like traps inside the InAs bandgap and in the lower part of the conduction band were significantly reduced by using wet chemical plus TMA treatments, in agreement with C-V characteristics.
Growth Parameters Optimization of GaN High Electron Mobility Transistor Structure on Silicon Carbide Substrate
(2014-01-01)
Wong, Y. Y.
;
Huang, S. C.
;
Huang, W. C.
;
Lumbantoruan, F.
;
Chiu, Y. S.
High electron mobility transistors heterostructures of AlGaN/GaN were grown by metalorganic chemical vapor deposition system on silicon carbide substrate. The growth parameters such as AlN buffer thickness, AlN spacer growth time and Al content in AlGaN barrier layer were optimized. Moreover, the effects of chamber pressure and V/III ratio at the initial growth state of GaN on film crystal quality were also investigated. The optimized AlGaN/GaN heterostructure has AlN buffer thickness of 120 nm, AlN spacer growth time of 10 s and Al content of 28% in the barrier layer. Furthermore, as a result of using higher chamber pressure and lower V/III, both the GaN crystal quality and electron mobility in the AlGaN/GaN were also significantly improved. After the growth parameter optimization, the GaN (002) and (102) planes exhibited X-ray rocking curve widths of 209 arcsec and 273 arcsec, respectively. Besides, the AlGaN/GaN structure also has an electron mobility of 1832 cm(2)/V-s and a sheet electron density of 1.08 10(13) cm(-2), which yielding a sheet resistance of 316 Omega/sq.
Effect of substrate misorientation on the material properties of GaAs/Al0.3Ga0.7As tunnel diodes
(2010-12-06)
Yu, H. W.
;
Chang, E. Y.
;
Nguyen, H. Q.
;
Chang, J. T.
;
Chung, C. C.
The effect of substrate misorientation on the material quality of the N++-GaAs/P++-AlGaAs tunnel diodes (TDs) grown on these substrates is investigated. It is found that the misorientation influences both surface roughness and interface properties of the N++-GaAs/P++-AlGaAs TDs. Smooth surface (rms roughness: 1.54 angstrom) and sharp interface for the GaAs/Al0.3Ga0.7As TDs were obtained when the (100) tilted 10 degrees off toward [111] GaAs substrate was used. Besides, the oxygen content in N++-GaAs and P++-AlGaAs layers grown on the 10 degrees off GaAs substrates was reduced due to the reduction of sticking coefficient and number of anisotropic sites. (C) 2010 American Institute of Physics. [doi:10.1063/1.3525158]
Improving electrical characteristics of W/HfO2/In0.53Ga0.47As gate stacks by altering deposition techniques
(2011-07-01)
Zade, D.
;
Kakushima, K.
;
Kanda, T.
;
Lin, Y. C.
;
Ahmet, P.
The effects of controlling InGaAs substrate temperature during electron beam deposition of HfO2 on electrical characteristics of W/HfO2/n-In0.53Ga0.47As capacitors are investigated. It is found that by depositing a thin HfO2 layer at the interface when substrate temperature is raised to 300 degrees C, frequency dispersion at depletion and accumulation conditions is reduced and interface state density is lowered regardless of the HfO2 thickness. Cross-sectional transmission electron microscopy images have revealed that the formation of mesoscopic voids in the InGaAs substrate near the interface is suppressed with HfO(2)deposition at 300 degrees C at the interface. A band diagram with an additional bulk trap energy level has been proposed to explain the frequency dispersion and conductance peaks at accumulation condition. (c) 2011 Elsevier B.V. All rights reserved.
Electrical Characterization of Al2O3/n-InAs Metal-Oxide-Semiconductor Capacitors With Various Surface Treatments
(2011-06-01)
Trinh, H. D.
;
Brammertz, G.
;
Chang, E. Y.
;
Kuo, C. I.
;
Lu, C. Y.
Ex situ sulfide and HCl wet chemical treatments in conjunction with in situ trimethyl aluminum (TMA) pretreatment were performed before the deposition of Al2O3 on n-InAs surfaces. X-ray photoelectron spectroscopy analyses show a significant reduction of InAs native oxides after different treatments. The capacitance-voltage C-V characterization of Al2O3/n-InAs structures shows that the frequency dispersion in the accumulation regime is small (< 0.75%/dec) and does not seem to be significantly affected by the different surface treatments, whereas the latter improves depletion and inversion behaviors of the n-channel metal-oxide-semiconductor capacitors. The interface trap density profiles extracted from the simulation mainly show donorlike interface states inside the InAs band gap and in the lower part of the conduction band. The donorlike traps inside the InAs band gap and in the lower part of the conduction band were significantly reduced by using wet-chemical-plus-TMA treatments, in agreement with C-V characteristics.
The influences of surface treatment and gas annealing conditions on the inversion behaviors of the atomic-layer-deposition Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor capacitor
(2010-07-26)
Trinh, H. D.
;
Chang, E. Y.
;
Wu, P. W.
;
Wong, Y. Y.
;
Chang, C. T.
The inversion behaviors of atomic-layer-deposition Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor capacitors are studied by various surface treatments and postdeposition annealing using different gases. By using the combination of wet sulfide and dry trimethyl aluminum surface treatment along with pure hydrogen annealing, a strong inversion capacitance-voltage (C-V) response is observed, indicating a remarkable reduction in interface trap state density (D-it) at lower half-part of In0.53Ga0.47As band gap. This low D-it was confirmed by the temperature independent C-V stretch-out and horizontal C-V curves. The x-ray photoelectron spectroscopy spectra further confirm the effectiveness of hydrogen annealing on the reduction of native oxides. (C) 2010 American Institute of Physics. [doi:10.1063/1.3467813]
GaN MIS-HEMT with Low Dynamic ON-resistance Using SiON Passivation
(2016-01-01)
Liu, S. C.
;
Huang, C. K.
;
Chang, E. Y.
;
材料科學與工程學系
;
電子工程學系及電子研究所
An effective SiON passivation with high density of positive fixed charges for GaN MIS-HEMTs is demonstrated. The positive fixed charges at the SiON/AlGaN interface effectively reduce the surface potential and expand the quantum well below the Fermi level, thus improving the device performance. The GaN MIS-HEMT with SiON demonstrated a high maximum drain-source current density (I-DS,I-max) of > 1 A/mm, a breakdown voltage of 750 V at a drain leakage current of 1 mu A/mm, and a well transfer characteristics. The dynamic ON-resistance only increased slightly under a high quiescent bias of 100 V.
Annealing Effect on the Electrical Properties of La2O3/InGaAs MOS Capacitors
(2011-01-01)
Kanda, T.
;
Zade, D.
;
Lin, Y. -C.
;
Kakushima, K.
;
Ahmet, P.
The electrical characteristics of InGaAs MOS capacitors with 8-nm-thick La2O3 gate dielectrics have been measured. The effects of annealing temperature and annealing time on the interface state densities (D-it) have been extracted. It has been found that the low Dit can be achieved by lowering the annealing temperature for an extended period of time.
Impact of material properties and device architecture on the device performance for a gate all around nanowire tunneling FET
(2017-11-01)
Singh, S. K.
;
Gupta, A.
;
Yu, H. W.
;
Nagarajan, V.
;
Anandan, D.
This paper systematically investigates the impact of gate dielectric, channel dimensional profile and the interface trap charge density on a homojunction indium-arsenide (InAs) gate all around nanowire tunneling FET (HJ-GAA-TFET). Device models were calibrated against the experimental data and simulations were performed to investigate the underlying physics. Device on-off (I-on/I-off) ratio was considered as key figure-of-merit (FOM) to improve. It is observed that the off current (I-off) is a weak function of dielectric constant, however, the on current (Ion) increases from 1.51 x 10(-7) A mu m(-1) to 1.79 x 10(-6) A mu m(-1) as the dielectric constant increases from SiO2 to La2O3. It was also observed that as the diameter increases, both Ion and Ioff increases. I-on/I-off ratio is independent for higher channel lengths but as the channel length is reduced below 30 nm, I-off increases causing degradation in Ion/Ioff ratio. Finally, the effect of interface traps was realised on the I-on/I-off ratio. Interface traps impact the flat-band voltage causing a shift in the device performance. It is observed that as the trap density increases, Ioff degrades rapidly by similar to 3 orders in magnitude.

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