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Bit error rate tester and pseudo random bit sequences generator thereof
(2006-06-22)
Chen, Wei-Zen
;
Huang, Guan-Sheng
A bit error rate tester and a pseudo random bit sequences (PRBS) generator thereof are provided. The bit error rate tester includes a transmitter PRBS generator, a master PRBS generator, a slave PRBS generator, a comparator, and a counting unit. The transmitter PRBS generator generates a parallel N-bit (N is an integer larger than 1) original PRBS, wherein an object to be tested receives the original PRBS and outputs a parallel N-bit code to be tested. The master and the slave PRBS generators generate a master and a slave parallel N-bit PRBS, respectively. The comparator receives, compares, and determines whether the code to be tested, the master and the slave PRBS are the same or not, and outputs a comparison result. The counting unit coupling to the comparator counts a number of bit errors based on the comparison result.
Fast-locked clock and data recovery circuit and the method thereof
(2008-04-10)
Chen, Wei-Zen
;
Wei, Chin-Yuan
The present invention discloses a fast-locked clock and data recovery circuit, which adopts a 2× oversampling technology and comprises: a multi phase-outputting phase-locked loop generating a plurality of phases θi; a phase interpolator synthesizing the obtained phases θn and θn+2 into a sampling phase Φn based on the weighting coefficient k; a phase detector detects the phase lead or lag between the input data and the sampling phase and generates an up/down signal; and a phase search engine update the weighting coefficient and modulate the sampling phase according to the up/down correction signals. Further, the present invention proposes a data recovery circuit implementing a binary search method and a 2× oversampling method, whereby the time for clock locking can be greatly reduced. Furthermore, the present invention utilizes a multi-phase time-sharing parallel sampling technology to achieve high-speed operation and low power consumption.
VOLTAGE-CONTROLLED OSCILLATOR
(2010-03-11)
Chen, Wei-Zen
;
Wu, Chung-Yu
;
Yu, Chi-Yao
A voltage-controlled oscillator comprises a variable inductor, a negative impedance circuit, an operating voltage source and a ground point. The variable inductor comprises a transformer and a transistor switch, the transformer comprising a primary side coil and a secondary side coil, the primary side coil comprising a first coil and a second coil, and the secondary side coil comprising a third coil and a fourth coil. The transistor switch is connected in parallel with the primary side coil to adjust an inductance value of the variable inductor based on a gate voltage. The negative impedance circuit is connected in parallel with the secondary side coil to compensate the power consumption of the voltage-controlled oscillator during oscillation. The operating voltage source is electrically connected between the third coil and the fourth coil, and the ground point is electrically connected between the first coil and the second coil.
A 10-Gb/s OEIC with Meshed Spatially-Modulated Photo Detector in 0.18-mu m CMOS Technology
(2011-05-01)
Huang, Shih-Hao
;
Chen, Wei-Zen
;
Chang, Yu-Wei
;
Huang, Yang-Tung
;
電子工程學系及電子研究所
This paper describes the design of a 10-Gb/s fully integrated CMOS optical receiver, which consists of a novel spatially-modulated photo detector (SMPD), a low-noise trans-impedance amplifier (TIA), and a post-limiting amplifier on a single chip. The bandwidth of proposed meshed SMPD can be boosted up to 6.9 GHz under a reverse-biased voltage of 14.2 V. The measured responsivity of the meshed SMPD is 29 mA/W as illuminated by 850-nm light source. To compensate the relatively low responsivity of on-chip CMOS photo detector (PD), a high-gain TIA with nested feedback and shunt peaking is proposed to achieve low-noise operation. The optical receiver is capable of delivering 25-k Omega conversion gain when driving 50-Omega output loads. For a PRBS test pattern of 2(7)-1, the 10-Gb/s optoelectronic integrated circuit (OEIC) has optical sensitivity of -6 dBm at a bit-error rate (BER) of 10(-11). Implemented in a generic 0.18-mu m CMOS technology, the chip area is 0.95 mm by 0.8 mm. The trans-impedance amplifier, post amplifier, and output buffer respectively drain 38 mW, 80 mW, and 27 mW from the 1.8-V supply.
A 38/114 GHz Switched-Mode and Synchronous Lock Standing Wave Oscillator
(2011-01-01)
Lu, Tai-You
;
Chen, Wei-Zen
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This letter presents a 38/114 GHz switched-mode standing wave oscillator (SWO) capable of synchronous locking. Triple output frequency can be excited by digital control of different mode operations. The experimental prototype was fabricated using a low leakage 65 nm 1P9M triple-well CMOS technology. Incorporating a synchronous lock scheme, the measured phase noise from a 38 GHz carrier before and after the phase locked at 1 MHz offset are -102 dBc/Hz and -120 dBc/Hz, respectively. For the mode 1 operation at 38 GHz and mode 3 operation at 114 GHz, the experimental prototype consumes 4 and 20 mA, respectively, under a 1.2 V biasing voltage and with a chip size of 720 x 880 mu m(2).
A 160-GHz Frequency-Translation Phase-Locked Loop With RSSI Assisted Frequency Acquisition
(2014-06-01)
Chen, Wei-Zen
;
Lu, Tai-You
;
Wang, Yan-Ting
;
Jian, Jhong-Ting
;
Yang, Yi-Hung
A 160-GHz frequency-translation PLL with tuning range from 156.4 GHz to 159.2 GHz is presented. Sub-THz 1/9 prescaler is replaced by a 3rd harmonic mixer incorporating a frequency tripler for frequency down conversion. A transformer-based VCO is utilized to alleviate capacitive and resistive load associated with varactor and succeeding buffer stages. Frequency acquisition is assisted by received signal strength indicator (RSSI) for automatic frequency sweeping and fast locking. Fabricated in 65 nm CMOS technology, the chip size is 0.92 mm(2). The PLL locking time is less than 3 mu s. This chip drains 24 mW from a 1.2 V power supply.
A Continuous-Wave THz Imaging System
(2013)
Pei, Ting-Hang
;
Huang, Yang-Tung
;
Wang, Yu-Jiu
;
Chen, Wei-Zen
;
Kuo, Chien-Nan
We develop a continuous wave terehertz (THz) imaging system operating at 288 GHz. This imaging system simply consitutes three parts including the source, two optical lenses, and the detector. The entire size is smaller than the tranditional pulsed THz imaging system. In this developed system, the THz wave is generated by a horn attenna which concentrates the wave in an azimuth angle of 3 degrees similar to 5 degrees. The source originates from a singnal generator, and then the frequency increases to 288 GHz after passing through an 8X multiplier. Next, THz wave is focused by a THz lens on the test sample. By controling the sample position in the x-z plane, we can scan it pixel-by-pixel in which each step along the x- or z- axes is 0.1 mm. After penetrating the test sample, another lens collects the transmitted THz wave and focuses them into the thermal detector. This detector can disply the collected THz power. Finally, by drawing the detected power of each pixel, a transmitted-intensity figure for all pixels is obtained. The resolution of this THz imaging system is about 1 similar to 2 mm at present. We have measured human molar tooth and obtained its transmitted figures. Besides, we also develop a technology to adjust the positions of the source and detector by a system containing one laser, one beamsplitter, and two mirrors. The relative positions between the source and detector is very important. The input of the source and the output of the detector are small so that they have to aim at each other very accurately in order to collect maximum transmitted power in the detector.
The development of a non-surgical direct drive hearing device with a wireless actuator coupled to the tympanic membrane
(2013-12-01)
Song, Yu-Lin
;
Jian, Jhong-Ting
;
Chen, Wei-Zen
;
Shih, Chih-Hua
;
Chou, Yuan-Fang
A non-surgical, direct driving hearing device with an actuator placed on the tympanic membrane was designed, fabricated and tested. The actuator consisted of two photodiodes, an aluminum ring, two neodymium iron permanent magnets, two opposing wound coils, a latex membrane and a Provil Novo (TM) membrane. The transducer coupled to the ear drum-utilizing photodiodes and permanent magnets on the motive components could eliminate the need for electrical connections to the moving components. An optic probe was designed to allow sound and light signals to enter the ear canal. By using opto-electromagnetic coupling, the developed hearing device could transmit information over a distance without using cables. The wireless actuator was achieved by two configurations: in one, two light emitting diodes were used for carrying the input signals, and in the other, the corresponding photodiodes were used for receiving the light signals and generating the currents in the actuator. The wireless actuator was designed to use light to carry energy and transmit the signals; thus, the occlusion effect created by traditional ear molds could be avoided. Finally, the wireless actuator was fabricated and tested with a laser Doppler vibrometer. The actuator showed displacements of vibration between 30-0.2 nm and from 400 Hz to 7 kHz with reduced vibration at higher frequencies. The gain of the actuator with 120 mu A on the umbo displacement was approximately 3-13 dB from 400 to1500 Hz and decreased to 6 dB between 1500 Hz to 3 kHz and down to -1 to -6 dB above 3 kHz. Distortions of the umbo vibration amplitude were approximately -1 to -10 dB across frequencies. The results suggest that light can transmit the sound signal remotely and that adequate amplification can be achieved by this actuator. The reduced amplitude above 3 kHz was a consequence of the mass effect of the actuator, which should be miniaturized in the future. Crown Copyright (c) 2013 Published by Elsevier Ltd. All rights reserved.
Wide Tunning Range 60 GHz VCO and 40 GHz DCO Using Single Variable Inductor
(2013-02-01)
Lu, Tai-You
;
Yu, Chi-Yao
;
Chen, Wei-Zen
;
Wu, Chung-Yu
;
電子工程學系及電子研究所
This paper presents a 60 GHz, 16% tuning range VCO, and a 40 GHz, 18 bits, 14% tuning range DCO incorporating variable inductor (VID) techniques. The variable inductor, consisting of a transformer and a variable resistor, is tunable by adjusting its resistor. By employing the proposed frequency tuning scheme, wide-tuning range as well as multi-band operation are achieved without sacrificing their operating frequencies. To verify the operation principles, the VCO and DCO are both fabricated in 90 nm CMOS technology. The tuning range of VCO is from 52.2 GHz to 61.3 GHz. The measured phase noise from a 61.3-GHz carrier is about -118.75 dBc/Hz at 10-MHz offset, and the output power is -6.6 dBm. It dissipates 8.7 mW from a 0.7-V supply, and the chip size is 0.28 x 0.36 mm(2). On the other hand, the DCO is capable of covering frequency range from 37.6 GHz to 43.4 GHz. The measured phase noise from a 43 GHz carrier is about -109 dBc/Hz at 10-MHz offset, and the output power is -11 dBm. The DCO core dissipates 19 mW from a 1.2-V supply. Chip size is 0.5 x 0.15 mm(2).
A 2.4 GHz Reference-Less Receiver for 1 Mbps QPSK Demodulation
(2012-03-01)
Chen, Wei-Zen
;
Lu, Tai-You
;
Ou, Wei-Wen
;
Chou, Shun-Tien
;
Yang, Song-Yu
A 2.4 GHz reference-less single chip wireless receiver for 1 Mbps QPSK demodulation is presented. The receiver accomplishes LO carrier recovery and data demodulation directly from the RF received signal without resort to resonator based reference, such as crystal oscillator. Integrating LNA, mixer, LO carrier recovery loop, postamplifier, and digital demodulator on a single chip, the total power consumption is 20.4 mW. The measured phase noise from a recovered carrier at 2.432 GHz is about -111 dBc/Hz at 1 MHz offset. The chip size is 1.75 x 1.55 mm(2).

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