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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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🏛️國立陽明交通大學機構典藏

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    具高畫質、低功率與人因優化之LCD面板及光源系統研究---總計畫
    (2009)
    謝漢萍
    ;
    HAN-PING SHIEH
    ;
    國立交通大學光電工程學系(所)
    次世代的顯示面板將以呈現高畫質與最接近自然的影像品質於人類視 覺系統中，並可同時兼顧節省能源、減少基材的環保需求；因此次世代顯 示面板將必須具有高動態顯示範圍(高亮度，高對比度)，廣色域顯示能力(高 色彩飽和度)，高清晰動態影像，高精細畫質，以及低功率消耗等特點；為 了實現這樣的次世代顯示技術，便需高整合性地結合人眼視覺模型與雙面 板顯示系統(液晶顯示面板+背光顯示系統)的先進技術，始能完成。本計畫 結合上述三個領域，整體性地研究最接近自然界的人眼視覺系統模型，以 此模型應用於整合液晶與背光顯示系統之次世代顯示驅動演算法，並提出 演算法最佳化之系統數學架構；根據開發之架構設計出高亮度、廣色域、 高解析、低耗電及輕薄之次世代顯示面板前瞻技術。
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    具高畫質、低功率與人因優化之LCD面板及光源顯示系統研究---子計畫二：LCD面板與光源之整合式驅動架構研發
    (2009)
    黃乙白
    ;
    Yi-Pai Huang
    ;
    國立交通大學光電工程學系(所)
    次世代的顯示面板將以呈現高畫質與最接近自然的影像品質於人類視 覺系統中，並可同時兼顧節省能源的環保需求；整合性地結合人眼視覺模 型與雙面板顯示系統(液晶顯示面板+背光顯示系統)的先進技術，始能實現 這樣的次世代顯示技術。本子計畫將研發雙面板顯示系統之最佳化演算法 模型，其研究內容將針對(1)背光源系統階調調整，(2)液晶對應補償運算， 以及(3)雙面板系統運算量優化等三個主要方向進行探討，並搭配人眼視覺 模型、全彩色序式LED 光源系統以及高解析微放電光源系統以階段性的開 發來使影像品質更自然，並達到高動態範圍、廣色域、高解析、低耗電及 輕薄之次世代顯示面板前瞻技術。
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    互斥問題之熱點衝突與路徑長度極小化
    (2000)
    黃廷祿
    ;
    交通大學資訊工程系
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    在整體照明中一個具有精確誤差估計的輻射熱演算法之設計
    (1998)
    施仁忠
    ;
    SHIH ZEN-CHUNG
    ;
    交通大學資訊科學系
    在電腦繪圖裡，整體照明是產生逼真影像的基本要素。輻射熱傳導法是解決整體照明問題的一個重要方法。特別是在虛擬實境的應用上，輻射熱傳導法可以增加虛擬環境的真實性。此外，由於此法與觀察者的位置無關，因此，輻射熱傳導法非常適合互動式漫遊系統。在輻射熱傳導法裡，最大的問題是精確度和執行效率。至目前為止，在輻射熱傳導法的文獻中，特別是在執行效率方面，已經有很多的論文探討。但是，在討論精確度方面，卻仍然只有少數的論文提到。由於輻射熱傳導法只能產生近似解，因此會產生誤差。如果能精確的測量誤差，輻射熱傳導法就能得到精確的解和可以當作分割準則的精確誤差界。因此，可靠和精確的誤差估計對輻射熱傳導法是很重要的。在本計畫中，我們將對輻射熱傳導法試著做更精確的誤差估計，同時提出適當執行效率的輻射熱傳導法滿足使用者所設定的誤差容忍度。
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    具實用性及交期導向之IC封裝廠排程演算法則之設計與應用
    (2001)
    彭文理
    ;
    WEN LEAPEARN
    ;
    國立交通大學工業工程與管理學系
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    An Adaptive, Low-Cost Wear-Leveling Algorithm for Multichannel Solid-State Disks
    (2013-12-01)
    Chang, Li-Pin
    ;
    Chou, Tung-Yang
    ;
    Huang, Li-Chun
    ;
    資訊工程學系
    ;
    Department of Computer Science
    Multilevel flash memory cells double or even triple storage density, producing affordable solid-state disks for end users. As flash memory endures only limited program-erase cycles, solid-state disks employ wear-leveling methods to prevent any portions of flash memory from being retired prematurely. Modern solid-state disks must consider wear evenness at both block and channel levels. This study first presents a block-level wear-leveling method whose design has two new ideas. First, the proposed method reuses the intelligence available in flash-translation layers so it does not require any new data structures. Second, it adaptively tunes the threshold of block-level wear leveling according to the runtime write pattern. This study further introduces a new channel-level wear-leveling strategy, because block-level wear leveling is confined to a channel, but realistic workloads do not evenly write all channels. The proposed method swaps logical blocks among channels for achieving an eventually-even state of channel lifetimes. A series of trace-driven simulations show that our wear-leveling method outperforms existing approaches in terms of wear evenness and overhead reduction.
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    Highest Urgency First (HUF): A latency and modulation aware bandwidth allocation algorithm for WiMAX base stations
    (2009-02-12)
    Lin, Yi-Neng
    ;
    Lin, Ying-Dar
    ;
    Lai, Yuan-Cheng
    ;
    Wu, Che-Wen
    ;
    交大名義發表
    The mobile WiMAX systems based on IEEE 802.16e-2005 provide high data rate for mobile wireless networks. However, the link quality is frequently unstable owing to mobility and air interference and therefore impacts the latency requirement of real-time applications. In the WiMAX standard, the modulation/coding scheme and the boundary of uplink/downlink sub-frames could be adjusted subject to channel quality and the traffic volume, respectively. This provides us a chance to design a MAC-layer uplink/downlink bandwidth allocation algorithm that is QoS/PHY-aware. This work takes into account the adaptive modulation and coding scheme (MCS), uplink and downlink traffic volume, and QoS parameters of all five defined service classes to design a bandwidth allocation algorithm that calculates the slot allocation in two phases. The first phase decides the boundary of uplink and downlink sub-frames by satisfying requests with pending latency violation and proportionating according to traffic volume, while the second phase allocates slots to mobile stations considering urgency, priority and fairness. Simulation results show our algorithm achieves zero latency violation and higher system throughput compared to existing non-QoS/PHY-aware or less-QOS/PHY-aware approaches. (C) 2008 Elsevier B.V. All rights reserved.
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    An improved algorithm for sorting by block-interchanges based on permutation groups
    (2010-04-01)
    Huang, Yen-Lin
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    Huang, Cheng-Chen
    ;
    Tang, Chuan Yi
    ;
    Lu, Chin Lung
    ;
    生物科技學系
    Given a chromosome represented by a permutation of genes, a block-interchange is proposed as a generalized transposition that affects the chromosome by swapping two non-intersecting segments of genes. The problem of sorting by block-interchanges is to find a minimum series of block-interchanges for sorting one chromosome into another. In this paper, we present an O(n + delta log delta) time algorithm for solving the problem of sorting by block-interchanges, which improves a previous algorithm of O(delta n) time proposed by Lin et al. (2005) [14], where n is the number of genes and delta is the minimum number of block-interchanges required to sort a chromosome. (C) 2010 Elsevier B.V. All rights reserved.
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    A Low-Cost Wear-Leveling Algorithm for Block-Mapping Solid-State Disks
    (2011)
    Chang, Li-Pin
    ;
    Huang, Li-Chun
    ;
    資訊工程學系
    ;
    Department of Computer Science
    Multilevel flash memory cells double or even triple storage density, producing affordable solid-state disks for end users. However, flash lifetime is becoming a critical issue in the popularity of solid-state disks. Wear-leveling methods can prevent flash-storage devices from prematurely retiring any portions of flash memory. The two practical challenges of wear-leveling design are implementation cost and tuning complexity. This study proposes a new wear-leveling design that features both simplicity and adaptiveness. This design requires no new data structures, but utilizes the intelligence available in sector-translating algorithms. Using an on-line tuning method, this design adaptively tunes itself to reach good balance between wear evenness and overhead. A series of trace-driven simulations show that the proposed design outperforms a competitive existing design in terms of wear evenness and overhead reduction. This study also presents a prototype that proves the feasibility of this wear-leveling design in real solid-state disks.